\n

PM

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x38 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x10 Bytes (0x0)
size : 0x18 byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x28 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x30 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : reserved
protection : not protected

Registers

DATA

OD

PUP

IE

CR

FR1

FR2


DATA

Port M Data Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA DATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PM0 PM1 PM2 PM3 PM4 PM5

PM0 : PM0
bits : 0 - 0 (1 bit)
access : read-write

PM1 : PM1
bits : 1 - 1 (1 bit)
access : read-write

PM2 : PM2
bits : 2 - 2 (1 bit)
access : read-write

PM3 : PM3
bits : 3 - 3 (1 bit)
access : read-write

PM4 : PM4
bits : 4 - 4 (1 bit)
access : read-write

PM5 : PM5
bits : 5 - 5 (1 bit)
access : read-write


OD

Port M Open-drain Control Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OD OD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PM0OD PM1OD PM2OD PM3OD PM4OD PM5OD

PM0OD : PM0OD
bits : 0 - 0 (1 bit)
access : read-write

PM1OD : PM1OD
bits : 1 - 1 (1 bit)
access : read-write

PM2OD : PM2OD
bits : 2 - 2 (1 bit)
access : read-write

PM3OD : PM3OD
bits : 3 - 3 (1 bit)
access : read-write

PM4OD : PM4OD
bits : 4 - 4 (1 bit)
access : read-write

PM5OD : PM5OD
bits : 5 - 5 (1 bit)
access : read-write


PUP

Port M Pull-up Control Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PUP PUP read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PM0UP PM1UP PM2UP PM3UP PM4UP PM5UP

PM0UP : PM0UP
bits : 0 - 0 (1 bit)
access : read-write

PM1UP : PM1UP
bits : 1 - 1 (1 bit)
access : read-write

PM2UP : PM2UP
bits : 2 - 2 (1 bit)
access : read-write

PM3UP : PM3UP
bits : 3 - 3 (1 bit)
access : read-write

PM4UP : PM4UP
bits : 4 - 4 (1 bit)
access : read-write

PM5UP : PM5UP
bits : 5 - 5 (1 bit)
access : read-write


IE

Port M Input Control Register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IE IE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PM0IE PM1IE PM2IE PM3IE PM4IE PM5IE

PM0IE : PM0IE
bits : 0 - 0 (1 bit)
access : read-write

PM1IE : PM1IE
bits : 1 - 1 (1 bit)
access : read-write

PM2IE : PM2IE
bits : 2 - 2 (1 bit)
access : read-write

PM3IE : PM3IE
bits : 3 - 3 (1 bit)
access : read-write

PM4IE : PM4IE
bits : 4 - 4 (1 bit)
access : read-write

PM5IE : PM5IE
bits : 5 - 5 (1 bit)
access : read-write


CR

Port M Output Control Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CR CR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PM0C PM1C PM2C PM3C PM4C PM5C

PM0C : PM0C
bits : 0 - 0 (1 bit)
access : read-write

PM1C : PM1C
bits : 1 - 1 (1 bit)
access : read-write

PM2C : PM2C
bits : 2 - 2 (1 bit)
access : read-write

PM3C : PM3C
bits : 3 - 3 (1 bit)
access : read-write

PM4C : PM4C
bits : 4 - 4 (1 bit)
access : read-write

PM5C : PM5C
bits : 5 - 5 (1 bit)
access : read-write


FR1

Port M Function Register 1
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FR1 FR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PM0F1 PM1F1 PM2F1 PM3F1 PM4F1 PM5F1

PM0F1 : PM0F1
bits : 0 - 0 (1 bit)
access : read-write

PM1F1 : PM1F1
bits : 1 - 1 (1 bit)
access : read-write

PM2F1 : PM2F1
bits : 2 - 2 (1 bit)
access : read-write

PM3F1 : PM3F1
bits : 3 - 3 (1 bit)
access : read-write

PM4F1 : PM4F1
bits : 4 - 4 (1 bit)
access : read-write

PM5F1 : PM5F1
bits : 5 - 5 (1 bit)
access : read-write


FR2

Port M Function Register 2
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FR2 FR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PM2F2 PM5F2

PM2F2 : PM2F2
bits : 2 - 2 (1 bit)
access : read-write

PM5F2 : PM5F2
bits : 5 - 5 (1 bit)
access : read-write



Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !

This website is sponsored by EmbeetleEmbeetle, an IDE designed from scratch for embedded software developers.