\n
address_offset : 0x0 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x38 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0xC Bytes (0x0)
size : 0x1C byte (0x0)
mem_usage : reserved
protection : not protected
address_offset : 0x28 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x30 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : reserved
protection : not protected
Port W Data Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PW0 : PW0
bits : 0 - 0 (1 bit)
access : read-write
PW1 : PW1
bits : 1 - 1 (1 bit)
access : read-write
PW2 : PW2
bits : 2 - 2 (1 bit)
access : read-write
PW3 : PW3
bits : 3 - 3 (1 bit)
access : read-write
PW4 : PW4
bits : 4 - 4 (1 bit)
access : read-write
PW5 : PW5
bits : 5 - 5 (1 bit)
access : read-write
PW6 : PW6
bits : 6 - 6 (1 bit)
access : read-write
PW7 : PW7
bits : 7 - 7 (1 bit)
access : read-write
Port W Open Drain Control Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PW0OD : PW0OD
bits : 0 - 0 (1 bit)
access : read-write
PW1OD : PW1OD
bits : 1 - 1 (1 bit)
access : read-write
PW2OD : PW2OD
bits : 2 - 2 (1 bit)
access : read-write
PW3OD : PW3OD
bits : 3 - 3 (1 bit)
access : read-write
PW4OD : PW4OD
bits : 4 - 4 (1 bit)
access : read-write
PW5OD : PW5OD
bits : 5 - 5 (1 bit)
access : read-write
PW6OD : PW6OD
bits : 6 - 6 (1 bit)
access : read-write
PW7OD : PW7OD
bits : 7 - 7 (1 bit)
access : read-write
Port W PWll-up Control Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PW0UP : PW0UP
bits : 0 - 0 (1 bit)
access : read-write
PW1UP : PW1UP
bits : 1 - 1 (1 bit)
access : read-write
PW2UP : PW2UP
bits : 2 - 2 (1 bit)
access : read-write
PW3UP : PW3UP
bits : 3 - 3 (1 bit)
access : read-write
PW4UP : PW4UP
bits : 4 - 4 (1 bit)
access : read-write
PW5UP : PW5UP
bits : 5 - 5 (1 bit)
access : read-write
PW6UP : PW6UP
bits : 6 - 6 (1 bit)
access : read-write
PW7UP : PW7UP
bits : 7 - 7 (1 bit)
access : read-write
Port W InPWt Control Register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PW0IE : PW0IE
bits : 0 - 0 (1 bit)
access : read-write
PW1IE : PW1IE
bits : 1 - 1 (1 bit)
access : read-write
PW2IE : PW2IE
bits : 2 - 2 (1 bit)
access : read-write
PW3IE : PW3IE
bits : 3 - 3 (1 bit)
access : read-write
PW4IE : PW4IE
bits : 4 - 4 (1 bit)
access : read-write
PW5IE : PW5IE
bits : 5 - 5 (1 bit)
access : read-write
PW6IE : PW6IE
bits : 6 - 6 (1 bit)
access : read-write
PW7IE : PW7IE
bits : 7 - 7 (1 bit)
access : read-write
Port W OutPWt Control Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PW0C : PW0C
bits : 0 - 0 (1 bit)
access : read-write
PW1C : PW1C
bits : 1 - 1 (1 bit)
access : read-write
PW2C : PW2C
bits : 2 - 2 (1 bit)
access : read-write
PW3C : PW3C
bits : 3 - 3 (1 bit)
access : read-write
PW4C : PW4C
bits : 4 - 4 (1 bit)
access : read-write
PW5C : PW5C
bits : 5 - 5 (1 bit)
access : read-write
PW6C : PW6C
bits : 6 - 6 (1 bit)
access : read-write
PW7C : PW7C
bits : 7 - 7 (1 bit)
access : read-write
Port W Function Register 1
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PW0F1 : PW0F1
bits : 0 - 0 (1 bit)
access : read-write
PW1F1 : PW1F1
bits : 1 - 1 (1 bit)
access : read-write
PW2F1 : PW2F1
bits : 2 - 2 (1 bit)
access : read-write
PW3F1 : PW3F1
bits : 3 - 3 (1 bit)
access : read-write
PW4F1 : PW4F1
bits : 4 - 4 (1 bit)
access : read-write
PW5F1 : PW5F1
bits : 5 - 5 (1 bit)
access : read-write
PW6F1 : PW6F1
bits : 6 - 6 (1 bit)
access : read-write
PW7F1 : PW7F1
bits : 7 - 7 (1 bit)
access : read-write
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