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PAC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x38 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0xC Bytes (0x0)
size : 0x1C byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x28 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x30 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : reserved
protection : not protected

Registers

DATA

OD

PUP

IE

CR

FR1


DATA

Port AC Data Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA DATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAC0 PAC1 PAC2 PAC3 PAC4 PAC5 PAC6 PAC7

PAC0 : PAC0
bits : 0 - 0 (1 bit)
access : read-write

PAC1 : PAC1
bits : 1 - 1 (1 bit)
access : read-write

PAC2 : PAC2
bits : 2 - 2 (1 bit)
access : read-write

PAC3 : PAC3
bits : 3 - 3 (1 bit)
access : read-write

PAC4 : PAC4
bits : 4 - 4 (1 bit)
access : read-write

PAC5 : PAC5
bits : 5 - 5 (1 bit)
access : read-write

PAC6 : PAC6
bits : 6 - 6 (1 bit)
access : read-write

PAC7 : PAC7
bits : 7 - 7 (1 bit)
access : read-write


OD

Port AC Open Drain Control Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OD OD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAC0OD PAC1OD PAC2OD PAC3OD PAC4OD PAC5OD PAC6OD PAC7OD

PAC0OD : PAC0OD
bits : 0 - 0 (1 bit)
access : read-write

PAC1OD : PAC1OD
bits : 1 - 1 (1 bit)
access : read-write

PAC2OD : PAC2OD
bits : 2 - 2 (1 bit)
access : read-write

PAC3OD : PAC3OD
bits : 3 - 3 (1 bit)
access : read-write

PAC4OD : PAC4OD
bits : 4 - 4 (1 bit)
access : read-write

PAC5OD : PAC5OD
bits : 5 - 5 (1 bit)
access : read-write

PAC6OD : PAC6OD
bits : 6 - 6 (1 bit)
access : read-write

PAC7OD : PAC7OD
bits : 7 - 7 (1 bit)
access : read-write


PUP

Port AC PACll-up Control Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PUP PUP read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAC0UP PAC1UP PAC2UP PAC3UP PAC4UP PAC5UP PAC6UP PAC7UP

PAC0UP : PAC0UP
bits : 0 - 0 (1 bit)
access : read-write

PAC1UP : PAC1UP
bits : 1 - 1 (1 bit)
access : read-write

PAC2UP : PAC2UP
bits : 2 - 2 (1 bit)
access : read-write

PAC3UP : PAC3UP
bits : 3 - 3 (1 bit)
access : read-write

PAC4UP : PAC4UP
bits : 4 - 4 (1 bit)
access : read-write

PAC5UP : PAC5UP
bits : 5 - 5 (1 bit)
access : read-write

PAC6UP : PAC6UP
bits : 6 - 6 (1 bit)
access : read-write

PAC7UP : PAC7UP
bits : 7 - 7 (1 bit)
access : read-write


IE

Port AC InPACt Control Register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IE IE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAC0IE PAC1IE PAC2IE PAC3IE PAC4IE PAC5IE PAC6IE PAC7IE

PAC0IE : PAC0IE
bits : 0 - 0 (1 bit)
access : read-write

PAC1IE : PAC1IE
bits : 1 - 1 (1 bit)
access : read-write

PAC2IE : PAC2IE
bits : 2 - 2 (1 bit)
access : read-write

PAC3IE : PAC3IE
bits : 3 - 3 (1 bit)
access : read-write

PAC4IE : PAC4IE
bits : 4 - 4 (1 bit)
access : read-write

PAC5IE : PAC5IE
bits : 5 - 5 (1 bit)
access : read-write

PAC6IE : PAC6IE
bits : 6 - 6 (1 bit)
access : read-write

PAC7IE : PAC7IE
bits : 7 - 7 (1 bit)
access : read-write


CR

Port AC OutPACt Control Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CR CR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAC0C PAC1C PAC2C PAC3C PAC4C PAC5C PAC6C PAC7C

PAC0C : PAC0C
bits : 0 - 0 (1 bit)
access : read-write

PAC1C : PAC1C
bits : 1 - 1 (1 bit)
access : read-write

PAC2C : PAC2C
bits : 2 - 2 (1 bit)
access : read-write

PAC3C : PAC3C
bits : 3 - 3 (1 bit)
access : read-write

PAC4C : PAC4C
bits : 4 - 4 (1 bit)
access : read-write

PAC5C : PAC5C
bits : 5 - 5 (1 bit)
access : read-write

PAC6C : PAC6C
bits : 6 - 6 (1 bit)
access : read-write

PAC7C : PAC7C
bits : 7 - 7 (1 bit)
access : read-write


FR1

Port AC Function Register 1
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FR1 FR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAC0F1 PAC1F1 PAC2F1 PAC3F1 PAC4F1 PAC5F1 PAC6F1 PAC7F1

PAC0F1 : PAC0F1
bits : 0 - 0 (1 bit)
access : read-write

PAC1F1 : PAC1F1
bits : 1 - 1 (1 bit)
access : read-write

PAC2F1 : PAC2F1
bits : 2 - 2 (1 bit)
access : read-write

PAC3F1 : PAC3F1
bits : 3 - 3 (1 bit)
access : read-write

PAC4F1 : PAC4F1
bits : 4 - 4 (1 bit)
access : read-write

PAC5F1 : PAC5F1
bits : 5 - 5 (1 bit)
access : read-write

PAC6F1 : PAC6F1
bits : 6 - 6 (1 bit)
access : read-write

PAC7F1 : PAC7F1
bits : 7 - 7 (1 bit)
access : read-write



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