\n

TC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x20 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x30 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x50 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x60 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x80 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x40 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x14 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x28 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0xD0 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0xC0 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0xA0 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x90 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x70 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0xB0 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x78 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0xB8 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x48 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x38 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x58 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x68 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x88 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x98 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0xA8 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0xC8 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : reserved
protection : not protected

Registers

EN

TBTRDCP

CMPCTL0

CMP0

CMPCTL1

CMP1

TBTRUN

CMPCTL2

CMP2

CMPCTL3

CMP3

CMPCTL4

CMP4

CMPCTL5

CMP5

TBTCR

CMPCTL6

CMP6

CMPCTL7

CMP7

CAPCR0

CAP0

CAPCR1

CAP1

TBTCP

CAPCR2

CAP2

CAPCR3

CAP3


EN

TC Enable Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EN EN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TCEN

TCEN : TCEN
bits : 7 - 7 (1 bit)
access : read-write


TBTRDCP

TC TBT Read Capture Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

TBTRDCP TBTRDCP read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RDCP

RDCP : RDCP
bits : 0 - 31 (32 bit)
access : read-only


CMPCTL0

TC Compare Control Register0
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMPCTL0 CMPCTL0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMPEN CMPRDE TCFF TCFFEN

CMPEN : CMPEN
bits : 0 - 0 (1 bit)
access : read-write

CMPRDE : CMPRDE
bits : 1 - 1 (1 bit)
access : read-write

TCFF : TCFF
bits : 4 - 5 (2 bit)
access : read-write

TCFFEN : TCFFEN
bits : 6 - 6 (1 bit)
access : read-write


CMP0

TC Compare Register0
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMP0 CMP0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMP

CMP : CMP
bits : 0 - 31 (32 bit)
access : read-write


CMPCTL1

TC Compare Control Register1
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMPCTL1 CMPCTL1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMPEN CMPRDE TCFF TCFFEN

CMPEN : CMPEN
bits : 0 - 0 (1 bit)
access : read-write

CMPRDE : CMPRDE
bits : 1 - 1 (1 bit)
access : read-write

TCFF : TCFF
bits : 4 - 5 (2 bit)
access : read-write

TCFFEN : TCFFEN
bits : 6 - 6 (1 bit)
access : read-write


CMP1

TC Compare Register1
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMP1 CMP1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMP

CMP : CMP
bits : 0 - 31 (32 bit)
access : read-write


TBTRUN

TC RUN Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TBTRUN TBTRUN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TBTRUN TBTPRUN TBTCAP I2TBT

TBTRUN : TBTRUN
bits : 0 - 0 (1 bit)
access : read-write

TBTPRUN : TBTPRUN
bits : 1 - 1 (1 bit)
access : read-write

TBTCAP : TBTCAP
bits : 2 - 2 (1 bit)
access : read-write

I2TBT : I2TBT
bits : 6 - 6 (1 bit)
access : read-write


CMPCTL2

TC Compare Control Register2
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMPCTL2 CMPCTL2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMPEN CMPRDE TCFF TCFFEN

CMPEN : CMPEN
bits : 0 - 0 (1 bit)
access : read-write

CMPRDE : CMPRDE
bits : 1 - 1 (1 bit)
access : read-write

TCFF : TCFF
bits : 4 - 5 (2 bit)
access : read-write

TCFFEN : TCFFEN
bits : 6 - 6 (1 bit)
access : read-write


CMP2

TC Compare Register2
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMP2 CMP2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMP

CMP : CMP
bits : 0 - 31 (32 bit)
access : read-write


CMPCTL3

TC Compare Control Register3
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMPCTL3 CMPCTL3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMPEN CMPRDE TCFF TCFFEN

CMPEN : CMPEN
bits : 0 - 0 (1 bit)
access : read-write

CMPRDE : CMPRDE
bits : 1 - 1 (1 bit)
access : read-write

TCFF : TCFF
bits : 4 - 5 (2 bit)
access : read-write

TCFFEN : TCFFEN
bits : 6 - 6 (1 bit)
access : read-write


CMP3

TC Compare Register3
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMP3 CMP3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMP

CMP : CMP
bits : 0 - 31 (32 bit)
access : read-write


CMPCTL4

TC Compare Control Register4
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMPCTL4 CMPCTL4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMPEN CMPRDE TCFF TCFFEN

CMPEN : CMPEN
bits : 0 - 0 (1 bit)
access : read-write

CMPRDE : CMPRDE
bits : 1 - 1 (1 bit)
access : read-write

TCFF : TCFF
bits : 4 - 5 (2 bit)
access : read-write

TCFFEN : TCFFEN
bits : 6 - 6 (1 bit)
access : read-write


CMP4

TC Compare Register4
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMP4 CMP4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMP

CMP : CMP
bits : 0 - 31 (32 bit)
access : read-write


CMPCTL5

TC Compare Control Register5
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMPCTL5 CMPCTL5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMPEN CMPRDE TCFF TCFFEN

CMPEN : CMPEN
bits : 0 - 0 (1 bit)
access : read-write

CMPRDE : CMPRDE
bits : 1 - 1 (1 bit)
access : read-write

TCFF : TCFF
bits : 4 - 5 (2 bit)
access : read-write

TCFFEN : TCFFEN
bits : 6 - 6 (1 bit)
access : read-write


CMP5

TC Compare Register5
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMP5 CMP5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMP

CMP : CMP
bits : 0 - 31 (32 bit)
access : read-write


TBTCR

TC Control Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TBTCR TBTCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TBTCLK TBTNF

TBTCLK : TBTCLK
bits : 0 - 3 (4 bit)
access : read-write

TBTNF : TBTNF
bits : 7 - 7 (1 bit)
access : read-write


CMPCTL6

TC Compare Control Register6
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMPCTL6 CMPCTL6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMPEN CMPRDE TCFF TCFFEN

CMPEN : CMPEN
bits : 0 - 0 (1 bit)
access : read-write

CMPRDE : CMPRDE
bits : 1 - 1 (1 bit)
access : read-write

TCFF : TCFF
bits : 4 - 5 (2 bit)
access : read-write

TCFFEN : TCFFEN
bits : 6 - 6 (1 bit)
access : read-write


CMP6

TC Compare Register6
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMP6 CMP6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMP

CMP : CMP
bits : 0 - 31 (32 bit)
access : read-write


CMPCTL7

TC Compare Control Register7
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMPCTL7 CMPCTL7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMPEN CMPRDE TCFF TCFFEN

CMPEN : CMPEN
bits : 0 - 0 (1 bit)
access : read-write

CMPRDE : CMPRDE
bits : 1 - 1 (1 bit)
access : read-write

TCFF : TCFF
bits : 4 - 5 (2 bit)
access : read-write

TCFFEN : TCFFEN
bits : 6 - 6 (1 bit)
access : read-write


CMP7

TC Compare Register7
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMP7 CMP7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMP

CMP : CMP
bits : 0 - 31 (32 bit)
access : read-write


CAPCR0

TC Capture Control Register0
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAPCR0 CAPCR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CPEG TCNF

CPEG : CPEG
bits : 0 - 1 (2 bit)
access : read-write

TCNF : TCNF
bits : 7 - 7 (1 bit)
access : read-write


CAP0

TC Capture Register0
address_offset : 0xA4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CAP0 CAP0 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CAP

CAP : CAP
bits : 0 - 31 (32 bit)
access : read-only


CAPCR1

TC Capture Control Register1
address_offset : 0xB0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAPCR1 CAPCR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CPEG TCNF

CPEG : CPEG
bits : 0 - 1 (2 bit)
access : read-write

TCNF : TCNF
bits : 7 - 7 (1 bit)
access : read-write


CAP1

TC Capture Register1
address_offset : 0xB4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CAP1 CAP1 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CAP

CAP : CAP
bits : 0 - 31 (32 bit)
access : read-only


TBTCP

TC TBT Capture Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

TBTCP TBTCP read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CAP

CAP : CAP
bits : 0 - 31 (32 bit)
access : read-only


CAPCR2

TC Capture Control Register2
address_offset : 0xC0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAPCR2 CAPCR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CPEG TCNF

CPEG : CPEG
bits : 0 - 1 (2 bit)
access : read-write

TCNF : TCNF
bits : 7 - 7 (1 bit)
access : read-write


CAP2

TC Capture Register2
address_offset : 0xC4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CAP2 CAP2 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CAP

CAP : CAP
bits : 0 - 31 (32 bit)
access : read-only


CAPCR3

TC Capture Control Register3
address_offset : 0xD0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAPCR3 CAPCR3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CPEG TCNF

CPEG : CPEG
bits : 0 - 1 (2 bit)
access : read-write

TCNF : TCNF
bits : 7 - 7 (1 bit)
access : read-write


CAP3

TC Capture Register3
address_offset : 0xD4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CAP3 CAP3 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CAP

CAP : CAP
bits : 0 - 31 (32 bit)
access : read-only



Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !

This website is sponsored by EmbeetleEmbeetle, an IDE designed from scratch for embedded software developers.