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SNFC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0xC Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x2C Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x110 Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x100 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x400 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x800 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x30 Bytes (0x0)
size : 0x24 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x840 Bytes (0x0)
size : 0x20 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x10 Bytes (0x0)
size : 0x1C byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x54 Bytes (0x0)
size : 0xAC byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x10C Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x124 Bytes (0x0)
size : 0x2DC byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x404 Bytes (0x0)
size : 0x3FC byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x80C Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x820 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x824 Bytes (0x0)
size : 0x1C byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x860 Bytes (0x0)
size : 0x20 byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x880 Bytes (0x0)
size : 0x80 byte (0x0)
mem_usage : registers
protection : not protected

Registers

ENC

PS

PRDB

IR1

IR2

EP1

EP2

EP3

EP4

EC

PRCS

S

SS

DIC

DOC

EIC

A1

A2

W

BIC

ECCMOD

CS1

EWRB

CS2

CS3

CS4

CSE

IE

CDRB

EOC

EBS

EES

EDS1

EDS2

EDS3

EDS4

EDS5

EDS6

EDS7

EDS8

S1EE1PI

S1EE2PI

S1EE3PI

S1EE4PI

S2EE1PI

S2EE2PI

S2EE3PI

S2EE4PI

S3EE1PI

S3EE2PI

S3EE3PI

S3EE4PI

S4EE1PI

S4EE2PI

S4EE3PI

S4EE4PI

S5EE1PI

S5EE2PI

S5EE3PI

S5EE4PI

S6EE1PI

S6EE2PI

S6EE3PI

S6EE4PI

S7EE1PI

S7EE2PI

S7EE3PI

S7EE4PI

S8EE1PI

S8EE2PI

S8EE3PI

S8EE4PI


ENC

SNFC Enable Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ENC ENC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EN

EN : EN
bits : 0 - 0 (1 bit)
access : read-write


PS

SNFC Page Size Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PS PS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CA

CA : CA
bits : 0 - 12 (13 bit)
access : read-write


PRDB

SNFC Page Read Buffer Registerer
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PRDB PRDB read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRDBUF

PRDBUF : PRDBUF
bits : 0 - 31 (32 bit)
access : read-only


IR1

SNFC Id Read Register 1
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IR1 IR1 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IDRD1 IDRD2 IDRD3 IDRD4

IDRD1 : IDRD1
bits : 0 - 7 (8 bit)
access : read-only

IDRD2 : IDRD2
bits : 8 - 15 (8 bit)
access : read-only

IDRD3 : IDRD3
bits : 16 - 23 (8 bit)
access : read-only

IDRD4 : IDRD4
bits : 24 - 31 (8 bit)
access : read-only


IR2

SNFC Id Read Register 2
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IR2 IR2 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IDRD5 IDRD6 IDRD7 IDRD8

IDRD5 : IDRD5
bits : 0 - 7 (8 bit)
access : read-only

IDRD6 : IDRD6
bits : 8 - 15 (8 bit)
access : read-only

IDRD7 : IDRD7
bits : 16 - 23 (8 bit)
access : read-only

IDRD8 : IDRD8
bits : 24 - 31 (8 bit)
access : read-only


EP1

SNFC Ecc Parity Register 1
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

EP1 EP1 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRTY1 PRTY2 PRTY3 PRTY4

PRTY1 : PRTY1
bits : 0 - 7 (8 bit)
access : read-only

PRTY2 : PRTY2
bits : 8 - 15 (8 bit)
access : read-only

PRTY3 : PRTY3
bits : 16 - 23 (8 bit)
access : read-only

PRTY4 : PRTY4
bits : 24 - 31 (8 bit)
access : read-only


EP2

SNFC Ecc Parity Register 2
address_offset : 0x114 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

EP2 EP2 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRTY5 PRTY6 PRTY7 PRTY8

PRTY5 : PRTY5
bits : 0 - 7 (8 bit)
access : read-only

PRTY6 : PRTY6
bits : 8 - 15 (8 bit)
access : read-only

PRTY7 : PRTY7
bits : 16 - 23 (8 bit)
access : read-only

PRTY8 : PRTY8
bits : 24 - 31 (8 bit)
access : read-only


EP3

SNFC Ecc Parity Register 3
address_offset : 0x118 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

EP3 EP3 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRTY9 PRTY10 PRTY11 PRTY12

PRTY9 : PRTY9
bits : 0 - 7 (8 bit)
access : read-only

PRTY10 : PRTY10
bits : 8 - 15 (8 bit)
access : read-only

PRTY11 : PRTY11
bits : 16 - 23 (8 bit)
access : read-only

PRTY12 : PRTY12
bits : 24 - 31 (8 bit)
access : read-only


EP4

SNFC Ecc Parity Register 4
address_offset : 0x11C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

EP4 EP4 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRTY13

PRTY13 : PRTY13
bits : 0 - 7 (8 bit)
access : read-only


EC

SNFC Ecc Crc Register
address_offset : 0x120 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

EC EC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CRC1 CRC2

CRC1 : CRC1
bits : 0 - 7 (8 bit)
access : read-only

CRC2 : CRC2
bits : 8 - 15 (8 bit)
access : read-only


PRCS

SNFC Page Read Column Status Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRCS PRCS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CAST

CAST : CAST
bits : 0 - 12 (13 bit)
access : read-write


S

SNFC Sector Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

S S read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SEC

SEC : SEC
bits : 0 - 3 (4 bit)
access : read-write


SS

SNFC Sector Status Register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SS SS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SECST

SECST : SECST
bits : 0 - 3 (4 bit)
access : read-write


DIC

SNFC Decode Input Count Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIC DIC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DECIN

DECIN : DECIN
bits : 0 - 9 (10 bit)
access : read-write


DOC

SNFC Decode Output Count Register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOC DOC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DECOUT

DECOUT : DECOUT
bits : 0 - 9 (10 bit)
access : read-write


EIC

SNFC Encode Input Count Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EIC EIC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ENCIN

ENCIN : ENCIN
bits : 0 - 9 (10 bit)
access : read-write


A1

SNFC Address Register 1
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

A1 A1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CA PA

CA : CA
bits : 0 - 12 (13 bit)
access : read-write

PA : PA
bits : 16 - 31 (16 bit)
access : read-write


A2

SNFC Address Register 2
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

A2 A2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PA

PA : PA
bits : 0 - 1 (2 bit)
access : read-write


W

SNFC Write Register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

W W read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ALECODE WRDATA

ALECODE : ALECODE
bits : 0 - 7 (8 bit)
access : read-write

WRDATA : WRDATA
bits : 8 - 15 (8 bit)
access : read-only


BIC

SNFC Bus Interface Control Register
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BIC BIC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RECYC DMYC1 DMYC2 REH REW RES WEH WEW WES ALEH ALES CLEH CLES

RECYC : RECYC
bits : 0 - 2 (3 bit)
access : read-write

DMYC1 : DMYC1
bits : 3 - 4 (2 bit)
access : read-only

DMYC2 : DMYC2
bits : 5 - 7 (3 bit)
access : read-write

REH : REH
bits : 8 - 10 (3 bit)
access : read-write

REW : REW
bits : 11 - 13 (3 bit)
access : read-only

RES : RES
bits : 14 - 15 (2 bit)
access : read-write

WEH : WEH
bits : 16 - 18 (3 bit)
access : read-write

WEW : WEW
bits : 19 - 21 (3 bit)
access : read-only

WES : WES
bits : 22 - 23 (2 bit)
access : read-write

ALEH : ALEH
bits : 24 - 25 (2 bit)
access : read-write

ALES : ALES
bits : 26 - 27 (2 bit)
access : read-only

CLEH : CLEH
bits : 28 - 29 (2 bit)
access : read-write

CLES : CLES
bits : 30 - 31 (2 bit)
access : read-write


ECCMOD

SNFC Ecc Mode Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ECCMOD ECCMOD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SELBCH GOUTMODE

SELBCH : SELBCH
bits : 0 - 0 (1 bit)
access : read-write

GOUTMODE : GOUTMODE
bits : 1 - 1 (1 bit)
access : read-write


CS1

SNFC Command Sequence Register 1
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CS1 CS1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMD1 WE PA3 PA CA CLE1 CMD2 RE DMYA BSY DMYB ALE CLE2

CMD1 : CMD1
bits : 0 - 7 (8 bit)
access : read-write

WE : WE
bits : 10 - 11 (2 bit)
access : read-write

PA3 : PA3
bits : 12 - 12 (1 bit)
access : read-write

PA : PA
bits : 13 - 13 (1 bit)
access : read-write

CA : CA
bits : 14 - 14 (1 bit)
access : read-write

CLE1 : CLE1
bits : 15 - 15 (1 bit)
access : read-write

CMD2 : CMD2
bits : 16 - 23 (8 bit)
access : read-write

RE : RE
bits : 24 - 25 (2 bit)
access : read-write

DMYA : DMYA
bits : 26 - 26 (1 bit)
access : read-write

BSY : BSY
bits : 27 - 27 (1 bit)
access : read-write

DMYB : DMYB
bits : 28 - 29 (2 bit)
access : read-write

ALE : ALE
bits : 30 - 30 (1 bit)
access : read-write

CLE2 : CLE2
bits : 31 - 31 (1 bit)
access : read-write


EWRB

SNFC Ecc Write Buffer Register
address_offset : 0x400 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EWRB EWRB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GIBUF

GIBUF : GIBUF
bits : 0 - 31 (32 bit)
access : read-write


CS2

SNFC Command Sequence Register 2
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CS2 CS2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMD1 WE PA3 PA CA CLE1 CMD2 RE DMYA BSY DMYB ALE CLE2

CMD1 : CMD1
bits : 0 - 7 (8 bit)
access : read-write

WE : WE
bits : 10 - 11 (2 bit)
access : read-write

PA3 : PA3
bits : 12 - 12 (1 bit)
access : read-write

PA : PA
bits : 13 - 13 (1 bit)
access : read-write

CA : CA
bits : 14 - 14 (1 bit)
access : read-write

CLE1 : CLE1
bits : 15 - 15 (1 bit)
access : read-write

CMD2 : CMD2
bits : 16 - 23 (8 bit)
access : read-write

RE : RE
bits : 24 - 25 (2 bit)
access : read-write

DMYA : DMYA
bits : 26 - 26 (1 bit)
access : read-write

BSY : BSY
bits : 27 - 27 (1 bit)
access : read-write

DMYB : DMYB
bits : 28 - 29 (2 bit)
access : read-write

ALE : ALE
bits : 30 - 30 (1 bit)
access : read-write

CLE2 : CLE2
bits : 31 - 31 (1 bit)
access : read-write


CS3

SNFC Command Sequence Register 3
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CS3 CS3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMD1 WE PA3 PA CA CLE1 CMD2 RE DMYA BSY DMYB ALE CLE2

CMD1 : CMD1
bits : 0 - 7 (8 bit)
access : read-write

WE : WE
bits : 10 - 11 (2 bit)
access : read-write

PA3 : PA3
bits : 12 - 12 (1 bit)
access : read-write

PA : PA
bits : 13 - 13 (1 bit)
access : read-write

CA : CA
bits : 14 - 14 (1 bit)
access : read-write

CLE1 : CLE1
bits : 15 - 15 (1 bit)
access : read-write

CMD2 : CMD2
bits : 16 - 23 (8 bit)
access : read-write

RE : RE
bits : 24 - 25 (2 bit)
access : read-write

DMYA : DMYA
bits : 26 - 26 (1 bit)
access : read-write

BSY : BSY
bits : 27 - 27 (1 bit)
access : read-write

DMYB : DMYB
bits : 28 - 29 (2 bit)
access : read-write

ALE : ALE
bits : 30 - 30 (1 bit)
access : read-write

CLE2 : CLE2
bits : 31 - 31 (1 bit)
access : read-write


CS4

SNFC Command Sequence Register 4
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CS4 CS4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMD1 WE PA3 PA CA CLE1 CMD2 RE DMYA BSY DMYB ALE CLE2

CMD1 : CMD1
bits : 0 - 7 (8 bit)
access : read-write

WE : WE
bits : 10 - 11 (2 bit)
access : read-write

PA3 : PA3
bits : 12 - 12 (1 bit)
access : read-write

PA : PA
bits : 13 - 13 (1 bit)
access : read-write

CA : CA
bits : 14 - 14 (1 bit)
access : read-write

CLE1 : CLE1
bits : 15 - 15 (1 bit)
access : read-write

CMD2 : CMD2
bits : 16 - 23 (8 bit)
access : read-write

RE : RE
bits : 24 - 25 (2 bit)
access : read-write

DMYA : DMYA
bits : 26 - 26 (1 bit)
access : read-write

BSY : BSY
bits : 27 - 27 (1 bit)
access : read-write

DMYB : DMYB
bits : 28 - 29 (2 bit)
access : read-write

ALE : ALE
bits : 30 - 30 (1 bit)
access : read-write

CLE2 : CLE2
bits : 31 - 31 (1 bit)
access : read-write


CSE

SNFC Command Sequence Enable Register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CSE CSE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMDSQ1 CMDSQ2 CMDSQ3 CMDSQ4 RAMSEL DECMODE

CMDSQ1 : CMDSQ1
bits : 0 - 0 (1 bit)
access : read-write

CMDSQ2 : CMDSQ2
bits : 1 - 1 (1 bit)
access : read-write

CMDSQ3 : CMDSQ3
bits : 2 - 2 (1 bit)
access : read-write

CMDSQ4 : CMDSQ4
bits : 3 - 3 (1 bit)
access : read-write

RAMSEL : RAMSEL
bits : 6 - 6 (1 bit)
access : read-write

DECMODE : DECMODE
bits : 7 - 7 (1 bit)
access : read-write


IE

SNFC Interrupt Enable Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IE IE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SEQEN SEQFLG SEQCLR PRDEN PRDFLG PRDCLR RAMFEN RAMFFLAG RAMFCLR FAILEN FAILFLG FAILCLR

SEQEN : SEQEN
bits : 0 - 0 (1 bit)
access : read-write

SEQFLG : SEQFLG
bits : 1 - 1 (1 bit)
access : read-only

SEQCLR : SEQCLR
bits : 2 - 2 (1 bit)
access : read-write

PRDEN : PRDEN
bits : 3 - 5 (3 bit)
access : read-write

PRDFLG : PRDFLG
bits : 6 - 6 (1 bit)
access : read-only

PRDCLR : PRDCLR
bits : 7 - 7 (1 bit)
access : read-write

RAMFEN : RAMFEN
bits : 8 - 16 (9 bit)
access : read-write

RAMFFLAG : RAMFFLAG
bits : 17 - 17 (1 bit)
access : read-only

RAMFCLR : RAMFCLR
bits : 18 - 18 (1 bit)
access : read-write

FAILEN : FAILEN
bits : 19 - 19 (1 bit)
access : read-write

FAILFLG : FAILFLG
bits : 20 - 20 (1 bit)
access : read-only

FAILCLR : FAILCLR
bits : 21 - 21 (1 bit)
access : read-write


CDRB

SNFC Correction Data Read Buffer Register
address_offset : 0x800 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CDRB CDRB read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RDBUF

RDBUF : RDBUF
bits : 0 - 31 (32 bit)
access : read-only


EOC

SNFC Ecc Output Control Register
address_offset : 0x804 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

EOC EOC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GOUT GOUTEN

GOUT : GOUT
bits : 0 - 7 (8 bit)
access : read-only

GOUTEN : GOUTEN
bits : 8 - 8 (1 bit)
access : read-write


EBS

SNFC Ecc Busy Status Register
address_offset : 0x808 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

EBS EBS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BSYST0 BSYST1 BSYST2

BSYST0 : BSYST0
bits : 0 - 0 (1 bit)
access : read-only

BSYST1 : BSYST1
bits : 1 - 1 (1 bit)
access : read-only

BSYST2 : BSYST2
bits : 2 - 2 (1 bit)
access : read-only


EES

SNFC Ecc Error Status Register
address_offset : 0x820 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

EES EES read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ERR1 ERR2 ERR3 ERR4 ERR5 ERR6 ERR7 ERR8

ERR1 : ERR1
bits : 0 - 0 (1 bit)
access : read-only

ERR2 : ERR2
bits : 1 - 1 (1 bit)
access : read-only

ERR3 : ERR3
bits : 2 - 2 (1 bit)
access : read-only

ERR4 : ERR4
bits : 3 - 3 (1 bit)
access : read-only

ERR5 : ERR5
bits : 4 - 4 (1 bit)
access : read-only

ERR6 : ERR6
bits : 5 - 5 (1 bit)
access : read-only

ERR7 : ERR7
bits : 6 - 6 (1 bit)
access : read-only

ERR8 : ERR8
bits : 7 - 7 (1 bit)
access : read-only


EDS1

SNFC Ecc Decode State Register 1
address_offset : 0x840 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

EDS1 EDS1 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SERR ERRST0 ERRST1 ERRST2 ERRST3 DECST

SERR : SERR
bits : 0 - 3 (4 bit)
access : read-only

ERRST0 : ERRST0
bits : 4 - 4 (1 bit)
access : read-only

ERRST1 : ERRST1
bits : 5 - 5 (1 bit)
access : read-only

ERRST2 : ERRST2
bits : 6 - 6 (1 bit)
access : read-only

ERRST3 : ERRST3
bits : 7 - 7 (1 bit)
access : read-only

DECST : DECST
bits : 8 - 9 (2 bit)
access : read-only


EDS2

SNFC Ecc Decode State Register 2
address_offset : 0x844 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

EDS2 EDS2 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SERR ERRST0 ERRST1 ERRST2 ERRST3 DECST

SERR : SERR
bits : 0 - 3 (4 bit)
access : read-only

ERRST0 : ERRST0
bits : 4 - 4 (1 bit)
access : read-only

ERRST1 : ERRST1
bits : 5 - 5 (1 bit)
access : read-only

ERRST2 : ERRST2
bits : 6 - 6 (1 bit)
access : read-only

ERRST3 : ERRST3
bits : 7 - 7 (1 bit)
access : read-only

DECST : DECST
bits : 8 - 9 (2 bit)
access : read-only


EDS3

SNFC Ecc Decode State Register 3
address_offset : 0x848 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

EDS3 EDS3 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SERR ERRST0 ERRST1 ERRST2 ERRST3 DECST

SERR : SERR
bits : 0 - 3 (4 bit)
access : read-only

ERRST0 : ERRST0
bits : 4 - 4 (1 bit)
access : read-only

ERRST1 : ERRST1
bits : 5 - 5 (1 bit)
access : read-only

ERRST2 : ERRST2
bits : 6 - 6 (1 bit)
access : read-only

ERRST3 : ERRST3
bits : 7 - 7 (1 bit)
access : read-only

DECST : DECST
bits : 8 - 9 (2 bit)
access : read-only


EDS4

SNFC Ecc Decode State Register 4
address_offset : 0x84C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

EDS4 EDS4 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SERR ERRST0 ERRST1 ERRST2 ERRST3 DECST

SERR : SERR
bits : 0 - 3 (4 bit)
access : read-only

ERRST0 : ERRST0
bits : 4 - 4 (1 bit)
access : read-only

ERRST1 : ERRST1
bits : 5 - 5 (1 bit)
access : read-only

ERRST2 : ERRST2
bits : 6 - 6 (1 bit)
access : read-only

ERRST3 : ERRST3
bits : 7 - 7 (1 bit)
access : read-only

DECST : DECST
bits : 8 - 9 (2 bit)
access : read-only


EDS5

SNFC Ecc Decode State Register 5
address_offset : 0x850 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

EDS5 EDS5 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SERR ERRST0 ERRST1 ERRST2 ERRST3 DECST

SERR : SERR
bits : 0 - 3 (4 bit)
access : read-only

ERRST0 : ERRST0
bits : 4 - 4 (1 bit)
access : read-only

ERRST1 : ERRST1
bits : 5 - 5 (1 bit)
access : read-only

ERRST2 : ERRST2
bits : 6 - 6 (1 bit)
access : read-only

ERRST3 : ERRST3
bits : 7 - 7 (1 bit)
access : read-only

DECST : DECST
bits : 8 - 9 (2 bit)
access : read-only


EDS6

SNFC Ecc Decode State Register 6
address_offset : 0x854 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

EDS6 EDS6 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SERR ERRST0 ERRST1 ERRST2 ERRST3 DECST

SERR : SERR
bits : 0 - 3 (4 bit)
access : read-only

ERRST0 : ERRST0
bits : 4 - 4 (1 bit)
access : read-only

ERRST1 : ERRST1
bits : 5 - 5 (1 bit)
access : read-only

ERRST2 : ERRST2
bits : 6 - 6 (1 bit)
access : read-only

ERRST3 : ERRST3
bits : 7 - 7 (1 bit)
access : read-only

DECST : DECST
bits : 8 - 9 (2 bit)
access : read-only


EDS7

SNFC Ecc Decode State Register 7
address_offset : 0x858 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

EDS7 EDS7 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SERR ERRST0 ERRST1 ERRST2 ERRST3 DECST

SERR : SERR
bits : 0 - 3 (4 bit)
access : read-only

ERRST0 : ERRST0
bits : 4 - 4 (1 bit)
access : read-only

ERRST1 : ERRST1
bits : 5 - 5 (1 bit)
access : read-only

ERRST2 : ERRST2
bits : 6 - 6 (1 bit)
access : read-only

ERRST3 : ERRST3
bits : 7 - 7 (1 bit)
access : read-only

DECST : DECST
bits : 8 - 9 (2 bit)
access : read-only


EDS8

SNFC Ecc Decode State Register 8
address_offset : 0x85C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

EDS8 EDS8 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SERR ERRST0 ERRST1 ERRST2 ERRST3 DECST

SERR : SERR
bits : 0 - 3 (4 bit)
access : read-only

ERRST0 : ERRST0
bits : 4 - 4 (1 bit)
access : read-only

ERRST1 : ERRST1
bits : 5 - 5 (1 bit)
access : read-only

ERRST2 : ERRST2
bits : 6 - 6 (1 bit)
access : read-only

ERRST3 : ERRST3
bits : 7 - 7 (1 bit)
access : read-only

DECST : DECST
bits : 8 - 9 (2 bit)
access : read-only


S1EE1PI

SNFC Sector 1 Ecc Error 1 Positional Information Register
address_offset : 0x880 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

S1EE1PI S1EE1PI read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AADD1 AADD2

AADD1 : AADD1
bits : 0 - 12 (13 bit)
access : read-only

AADD2 : AADD2
bits : 16 - 28 (13 bit)
access : read-only


S1EE2PI

SNFC Sector 1 Ecc Error 2 Positional Information Register
address_offset : 0x884 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

S1EE2PI S1EE2PI read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AADD3 AADD4

AADD3 : AADD3
bits : 0 - 12 (13 bit)
access : read-only

AADD4 : AADD4
bits : 16 - 28 (13 bit)
access : read-only


S1EE3PI

SNFC Sector 1 Ecc Error 3 Positional Information Register
address_offset : 0x888 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

S1EE3PI S1EE3PI read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AADD5 AADD6

AADD5 : AADD5
bits : 0 - 12 (13 bit)
access : read-only

AADD6 : AADD6
bits : 16 - 28 (13 bit)
access : read-only


S1EE4PI

SNFC Sector 1 Ecc Error 4 Positional Information Register
address_offset : 0x88C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

S1EE4PI S1EE4PI read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AADD7 AADD8

AADD7 : AADD7
bits : 0 - 12 (13 bit)
access : read-only

AADD8 : AADD8
bits : 16 - 28 (13 bit)
access : read-only


S2EE1PI

SNFC Sector 2 Ecc Error 1 Positional Information Register
address_offset : 0x890 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

S2EE1PI S2EE1PI read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AADD1 AADD2

AADD1 : AADD1
bits : 0 - 12 (13 bit)
access : read-only

AADD2 : AADD2
bits : 16 - 28 (13 bit)
access : read-only


S2EE2PI

SNFC Sector 2 Ecc Error 2 Positional Information Register
address_offset : 0x894 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

S2EE2PI S2EE2PI read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AADD3 AADD4

AADD3 : AADD3
bits : 0 - 12 (13 bit)
access : read-only

AADD4 : AADD4
bits : 16 - 28 (13 bit)
access : read-only


S2EE3PI

SNFC Sector 2 Ecc Error 3 Positional Information Register
address_offset : 0x898 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

S2EE3PI S2EE3PI read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AADD5 AADD6

AADD5 : AADD5
bits : 0 - 12 (13 bit)
access : read-only

AADD6 : AADD6
bits : 16 - 28 (13 bit)
access : read-only


S2EE4PI

SNFC Sector 2 Ecc Error 4 Positional Information Register
address_offset : 0x89C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

S2EE4PI S2EE4PI read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AADD7 AADD8

AADD7 : AADD7
bits : 0 - 12 (13 bit)
access : read-only

AADD8 : AADD8
bits : 16 - 28 (13 bit)
access : read-only


S3EE1PI

SNFC Sector 3 Ecc Error 1 Positional Information Register
address_offset : 0x8A0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

S3EE1PI S3EE1PI read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AADD1 AADD2

AADD1 : AADD1
bits : 0 - 12 (13 bit)
access : read-only

AADD2 : AADD2
bits : 16 - 28 (13 bit)
access : read-only


S3EE2PI

SNFC Sector 3 Ecc Error 2 Positional Information Register
address_offset : 0x8A4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

S3EE2PI S3EE2PI read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AADD3 AADD4

AADD3 : AADD3
bits : 0 - 12 (13 bit)
access : read-only

AADD4 : AADD4
bits : 16 - 28 (13 bit)
access : read-only


S3EE3PI

SNFC Sector 3 Ecc Error 3 Positional Information Register
address_offset : 0x8A8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

S3EE3PI S3EE3PI read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AADD5 AADD6

AADD5 : AADD5
bits : 0 - 12 (13 bit)
access : read-only

AADD6 : AADD6
bits : 16 - 28 (13 bit)
access : read-only


S3EE4PI

SNFC Sector 3 Ecc Error 4 Positional Information Register
address_offset : 0x8AC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

S3EE4PI S3EE4PI read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AADD7 AADD8

AADD7 : AADD7
bits : 0 - 12 (13 bit)
access : read-only

AADD8 : AADD8
bits : 16 - 28 (13 bit)
access : read-only


S4EE1PI

SNFC Sector 4 Ecc Error 1 Positional Information Register
address_offset : 0x8B0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

S4EE1PI S4EE1PI read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AADD1 AADD2

AADD1 : AADD1
bits : 0 - 12 (13 bit)
access : read-only

AADD2 : AADD2
bits : 16 - 28 (13 bit)
access : read-only


S4EE2PI

SNFC Sector 4 Ecc Error 2 Positional Information Register
address_offset : 0x8B4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

S4EE2PI S4EE2PI read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AADD3 AADD4

AADD3 : AADD3
bits : 0 - 12 (13 bit)
access : read-only

AADD4 : AADD4
bits : 16 - 28 (13 bit)
access : read-only


S4EE3PI

SNFC Sector 4 Ecc Error 3 Positional Information Register
address_offset : 0x8B8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

S4EE3PI S4EE3PI read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AADD5 AADD6

AADD5 : AADD5
bits : 0 - 12 (13 bit)
access : read-only

AADD6 : AADD6
bits : 16 - 28 (13 bit)
access : read-only


S4EE4PI

SNFC Sector 4 Ecc Error 4 Positional Information Register
address_offset : 0x8BC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

S4EE4PI S4EE4PI read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AADD7 AADD8

AADD7 : AADD7
bits : 0 - 12 (13 bit)
access : read-only

AADD8 : AADD8
bits : 16 - 28 (13 bit)
access : read-only


S5EE1PI

SNFC Sector 5 Ecc Error 1 Positional Information Register
address_offset : 0x8C0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

S5EE1PI S5EE1PI read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AADD1 AADD2

AADD1 : AADD1
bits : 0 - 12 (13 bit)
access : read-only

AADD2 : AADD2
bits : 16 - 28 (13 bit)
access : read-only


S5EE2PI

SNFC Sector 5 Ecc Error 2 Positional Information Register
address_offset : 0x8C4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

S5EE2PI S5EE2PI read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AADD3 AADD4

AADD3 : AADD3
bits : 0 - 12 (13 bit)
access : read-only

AADD4 : AADD4
bits : 16 - 28 (13 bit)
access : read-only


S5EE3PI

SNFC Sector 5 Ecc Error 3 Positional Information Register
address_offset : 0x8C8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

S5EE3PI S5EE3PI read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AADD5 AADD6

AADD5 : AADD5
bits : 0 - 12 (13 bit)
access : read-only

AADD6 : AADD6
bits : 16 - 28 (13 bit)
access : read-only


S5EE4PI

SNFC Sector 5 Ecc Error 4 Positional Information Register
address_offset : 0x8CC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

S5EE4PI S5EE4PI read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AADD7 AADD8

AADD7 : AADD7
bits : 0 - 12 (13 bit)
access : read-only

AADD8 : AADD8
bits : 16 - 28 (13 bit)
access : read-only


S6EE1PI

SNFC Sector 6 Ecc Error 1 Positional Information Register
address_offset : 0x8D0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

S6EE1PI S6EE1PI read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AADD1 AADD2

AADD1 : AADD1
bits : 0 - 12 (13 bit)
access : read-only

AADD2 : AADD2
bits : 16 - 28 (13 bit)
access : read-only


S6EE2PI

SNFC Sector 6 Ecc Error 2 Positional Information Register
address_offset : 0x8D4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

S6EE2PI S6EE2PI read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AADD3 AADD4

AADD3 : AADD3
bits : 0 - 12 (13 bit)
access : read-only

AADD4 : AADD4
bits : 16 - 28 (13 bit)
access : read-only


S6EE3PI

SNFC Sector 6 Ecc Error 3 Positional Information Register
address_offset : 0x8D8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

S6EE3PI S6EE3PI read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AADD5 AADD6

AADD5 : AADD5
bits : 0 - 12 (13 bit)
access : read-only

AADD6 : AADD6
bits : 16 - 28 (13 bit)
access : read-only


S6EE4PI

SNFC Sector 6 Ecc Error 4 Positional Information Register
address_offset : 0x8DC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

S6EE4PI S6EE4PI read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AADD7 AADD8

AADD7 : AADD7
bits : 0 - 12 (13 bit)
access : read-only

AADD8 : AADD8
bits : 16 - 28 (13 bit)
access : read-only


S7EE1PI

SNFC Sector 7 Ecc Error 1 Positional Information Register
address_offset : 0x8E0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

S7EE1PI S7EE1PI read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AADD1 AADD2

AADD1 : AADD1
bits : 0 - 12 (13 bit)
access : read-only

AADD2 : AADD2
bits : 16 - 28 (13 bit)
access : read-only


S7EE2PI

SNFC Sector 7 Ecc Error 2 Positional Information Register
address_offset : 0x8E4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

S7EE2PI S7EE2PI read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AADD3 AADD4

AADD3 : AADD3
bits : 0 - 12 (13 bit)
access : read-only

AADD4 : AADD4
bits : 16 - 28 (13 bit)
access : read-only


S7EE3PI

SNFC Sector 7 Ecc Error 3 Positional Information Register
address_offset : 0x8E8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

S7EE3PI S7EE3PI read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AADD5 AADD6

AADD5 : AADD5
bits : 0 - 12 (13 bit)
access : read-only

AADD6 : AADD6
bits : 16 - 28 (13 bit)
access : read-only


S7EE4PI

SNFC Sector 7 Ecc Error 4 Positional Information Register
address_offset : 0x8EC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

S7EE4PI S7EE4PI read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AADD7 AADD8

AADD7 : AADD7
bits : 0 - 12 (13 bit)
access : read-only

AADD8 : AADD8
bits : 16 - 28 (13 bit)
access : read-only


S8EE1PI

SNFC Sector 8 Ecc Error 1 Positional Information Register
address_offset : 0x8F0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

S8EE1PI S8EE1PI read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AADD1 AADD2

AADD1 : AADD1
bits : 0 - 12 (13 bit)
access : read-only

AADD2 : AADD2
bits : 16 - 28 (13 bit)
access : read-only


S8EE2PI

SNFC Sector 8 Ecc Error 2 Positional Information Register
address_offset : 0x8F4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

S8EE2PI S8EE2PI read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AADD3 AADD4

AADD3 : AADD3
bits : 0 - 12 (13 bit)
access : read-only

AADD4 : AADD4
bits : 16 - 28 (13 bit)
access : read-only


S8EE3PI

SNFC Sector 8 Ecc Error 3 Positional Information Register
address_offset : 0x8F8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

S8EE3PI S8EE3PI read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AADD5 AADD6

AADD5 : AADD5
bits : 0 - 12 (13 bit)
access : read-only

AADD6 : AADD6
bits : 16 - 28 (13 bit)
access : read-only


S8EE4PI

SNFC Sector 8 Ecc Error 4 Positional Information Register
address_offset : 0x8FC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

S8EE4PI S8EE4PI read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AADD7 AADD8

AADD7 : AADD7
bits : 0 - 12 (13 bit)
access : read-only

AADD8 : AADD8
bits : 16 - 28 (13 bit)
access : read-only



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