\n
address_offset : 0x0 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0xC Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : reserved
protection : not protected
address_offset : 0x2C Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : reserved
protection : not protected
address_offset : 0x110 Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x100 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x400 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x800 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x30 Bytes (0x0)
size : 0x24 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x840 Bytes (0x0)
size : 0x20 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x10 Bytes (0x0)
size : 0x1C byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x54 Bytes (0x0)
size : 0xAC byte (0x0)
mem_usage : reserved
protection : not protected
address_offset : 0x10C Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : reserved
protection : not protected
address_offset : 0x124 Bytes (0x0)
size : 0x2DC byte (0x0)
mem_usage : reserved
protection : not protected
address_offset : 0x404 Bytes (0x0)
size : 0x3FC byte (0x0)
mem_usage : reserved
protection : not protected
address_offset : 0x80C Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : reserved
protection : not protected
address_offset : 0x820 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x824 Bytes (0x0)
size : 0x1C byte (0x0)
mem_usage : reserved
protection : not protected
address_offset : 0x860 Bytes (0x0)
size : 0x20 byte (0x0)
mem_usage : reserved
protection : not protected
address_offset : 0x880 Bytes (0x0)
size : 0x80 byte (0x0)
mem_usage : registers
protection : not protected
SNFC Enable Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN : EN
bits : 0 - 0 (1 bit)
access : read-write
SNFC Page Size Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CA : CA
bits : 0 - 12 (13 bit)
access : read-write
SNFC Page Read Buffer Registerer
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PRDBUF : PRDBUF
bits : 0 - 31 (32 bit)
access : read-only
SNFC Id Read Register 1
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
IDRD1 : IDRD1
bits : 0 - 7 (8 bit)
access : read-only
IDRD2 : IDRD2
bits : 8 - 15 (8 bit)
access : read-only
IDRD3 : IDRD3
bits : 16 - 23 (8 bit)
access : read-only
IDRD4 : IDRD4
bits : 24 - 31 (8 bit)
access : read-only
SNFC Id Read Register 2
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
IDRD5 : IDRD5
bits : 0 - 7 (8 bit)
access : read-only
IDRD6 : IDRD6
bits : 8 - 15 (8 bit)
access : read-only
IDRD7 : IDRD7
bits : 16 - 23 (8 bit)
access : read-only
IDRD8 : IDRD8
bits : 24 - 31 (8 bit)
access : read-only
SNFC Ecc Parity Register 1
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PRTY1 : PRTY1
bits : 0 - 7 (8 bit)
access : read-only
PRTY2 : PRTY2
bits : 8 - 15 (8 bit)
access : read-only
PRTY3 : PRTY3
bits : 16 - 23 (8 bit)
access : read-only
PRTY4 : PRTY4
bits : 24 - 31 (8 bit)
access : read-only
SNFC Ecc Parity Register 2
address_offset : 0x114 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PRTY5 : PRTY5
bits : 0 - 7 (8 bit)
access : read-only
PRTY6 : PRTY6
bits : 8 - 15 (8 bit)
access : read-only
PRTY7 : PRTY7
bits : 16 - 23 (8 bit)
access : read-only
PRTY8 : PRTY8
bits : 24 - 31 (8 bit)
access : read-only
SNFC Ecc Parity Register 3
address_offset : 0x118 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PRTY9 : PRTY9
bits : 0 - 7 (8 bit)
access : read-only
PRTY10 : PRTY10
bits : 8 - 15 (8 bit)
access : read-only
PRTY11 : PRTY11
bits : 16 - 23 (8 bit)
access : read-only
PRTY12 : PRTY12
bits : 24 - 31 (8 bit)
access : read-only
SNFC Ecc Parity Register 4
address_offset : 0x11C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PRTY13 : PRTY13
bits : 0 - 7 (8 bit)
access : read-only
SNFC Ecc Crc Register
address_offset : 0x120 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CRC1 : CRC1
bits : 0 - 7 (8 bit)
access : read-only
CRC2 : CRC2
bits : 8 - 15 (8 bit)
access : read-only
SNFC Page Read Column Status Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CAST : CAST
bits : 0 - 12 (13 bit)
access : read-write
SNFC Sector Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : SEC
bits : 0 - 3 (4 bit)
access : read-write
SNFC Sector Status Register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SECST : SECST
bits : 0 - 3 (4 bit)
access : read-write
SNFC Decode Input Count Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DECIN : DECIN
bits : 0 - 9 (10 bit)
access : read-write
SNFC Decode Output Count Register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DECOUT : DECOUT
bits : 0 - 9 (10 bit)
access : read-write
SNFC Encode Input Count Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENCIN : ENCIN
bits : 0 - 9 (10 bit)
access : read-write
SNFC Address Register 1
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CA : CA
bits : 0 - 12 (13 bit)
access : read-write
PA : PA
bits : 16 - 31 (16 bit)
access : read-write
SNFC Address Register 2
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PA : PA
bits : 0 - 1 (2 bit)
access : read-write
SNFC Write Register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ALECODE : ALECODE
bits : 0 - 7 (8 bit)
access : read-write
WRDATA : WRDATA
bits : 8 - 15 (8 bit)
access : read-only
SNFC Bus Interface Control Register
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RECYC : RECYC
bits : 0 - 2 (3 bit)
access : read-write
DMYC1 : DMYC1
bits : 3 - 4 (2 bit)
access : read-only
DMYC2 : DMYC2
bits : 5 - 7 (3 bit)
access : read-write
REH : REH
bits : 8 - 10 (3 bit)
access : read-write
REW : REW
bits : 11 - 13 (3 bit)
access : read-only
RES : RES
bits : 14 - 15 (2 bit)
access : read-write
WEH : WEH
bits : 16 - 18 (3 bit)
access : read-write
WEW : WEW
bits : 19 - 21 (3 bit)
access : read-only
WES : WES
bits : 22 - 23 (2 bit)
access : read-write
ALEH : ALEH
bits : 24 - 25 (2 bit)
access : read-write
ALES : ALES
bits : 26 - 27 (2 bit)
access : read-only
CLEH : CLEH
bits : 28 - 29 (2 bit)
access : read-write
CLES : CLES
bits : 30 - 31 (2 bit)
access : read-write
SNFC Ecc Mode Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SELBCH : SELBCH
bits : 0 - 0 (1 bit)
access : read-write
GOUTMODE : GOUTMODE
bits : 1 - 1 (1 bit)
access : read-write
SNFC Command Sequence Register 1
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CMD1 : CMD1
bits : 0 - 7 (8 bit)
access : read-write
WE : WE
bits : 10 - 11 (2 bit)
access : read-write
PA3 : PA3
bits : 12 - 12 (1 bit)
access : read-write
PA : PA
bits : 13 - 13 (1 bit)
access : read-write
CA : CA
bits : 14 - 14 (1 bit)
access : read-write
CLE1 : CLE1
bits : 15 - 15 (1 bit)
access : read-write
CMD2 : CMD2
bits : 16 - 23 (8 bit)
access : read-write
RE : RE
bits : 24 - 25 (2 bit)
access : read-write
DMYA : DMYA
bits : 26 - 26 (1 bit)
access : read-write
BSY : BSY
bits : 27 - 27 (1 bit)
access : read-write
DMYB : DMYB
bits : 28 - 29 (2 bit)
access : read-write
ALE : ALE
bits : 30 - 30 (1 bit)
access : read-write
CLE2 : CLE2
bits : 31 - 31 (1 bit)
access : read-write
SNFC Ecc Write Buffer Register
address_offset : 0x400 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GIBUF : GIBUF
bits : 0 - 31 (32 bit)
access : read-write
SNFC Command Sequence Register 2
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CMD1 : CMD1
bits : 0 - 7 (8 bit)
access : read-write
WE : WE
bits : 10 - 11 (2 bit)
access : read-write
PA3 : PA3
bits : 12 - 12 (1 bit)
access : read-write
PA : PA
bits : 13 - 13 (1 bit)
access : read-write
CA : CA
bits : 14 - 14 (1 bit)
access : read-write
CLE1 : CLE1
bits : 15 - 15 (1 bit)
access : read-write
CMD2 : CMD2
bits : 16 - 23 (8 bit)
access : read-write
RE : RE
bits : 24 - 25 (2 bit)
access : read-write
DMYA : DMYA
bits : 26 - 26 (1 bit)
access : read-write
BSY : BSY
bits : 27 - 27 (1 bit)
access : read-write
DMYB : DMYB
bits : 28 - 29 (2 bit)
access : read-write
ALE : ALE
bits : 30 - 30 (1 bit)
access : read-write
CLE2 : CLE2
bits : 31 - 31 (1 bit)
access : read-write
SNFC Command Sequence Register 3
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CMD1 : CMD1
bits : 0 - 7 (8 bit)
access : read-write
WE : WE
bits : 10 - 11 (2 bit)
access : read-write
PA3 : PA3
bits : 12 - 12 (1 bit)
access : read-write
PA : PA
bits : 13 - 13 (1 bit)
access : read-write
CA : CA
bits : 14 - 14 (1 bit)
access : read-write
CLE1 : CLE1
bits : 15 - 15 (1 bit)
access : read-write
CMD2 : CMD2
bits : 16 - 23 (8 bit)
access : read-write
RE : RE
bits : 24 - 25 (2 bit)
access : read-write
DMYA : DMYA
bits : 26 - 26 (1 bit)
access : read-write
BSY : BSY
bits : 27 - 27 (1 bit)
access : read-write
DMYB : DMYB
bits : 28 - 29 (2 bit)
access : read-write
ALE : ALE
bits : 30 - 30 (1 bit)
access : read-write
CLE2 : CLE2
bits : 31 - 31 (1 bit)
access : read-write
SNFC Command Sequence Register 4
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CMD1 : CMD1
bits : 0 - 7 (8 bit)
access : read-write
WE : WE
bits : 10 - 11 (2 bit)
access : read-write
PA3 : PA3
bits : 12 - 12 (1 bit)
access : read-write
PA : PA
bits : 13 - 13 (1 bit)
access : read-write
CA : CA
bits : 14 - 14 (1 bit)
access : read-write
CLE1 : CLE1
bits : 15 - 15 (1 bit)
access : read-write
CMD2 : CMD2
bits : 16 - 23 (8 bit)
access : read-write
RE : RE
bits : 24 - 25 (2 bit)
access : read-write
DMYA : DMYA
bits : 26 - 26 (1 bit)
access : read-write
BSY : BSY
bits : 27 - 27 (1 bit)
access : read-write
DMYB : DMYB
bits : 28 - 29 (2 bit)
access : read-write
ALE : ALE
bits : 30 - 30 (1 bit)
access : read-write
CLE2 : CLE2
bits : 31 - 31 (1 bit)
access : read-write
SNFC Command Sequence Enable Register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CMDSQ1 : CMDSQ1
bits : 0 - 0 (1 bit)
access : read-write
CMDSQ2 : CMDSQ2
bits : 1 - 1 (1 bit)
access : read-write
CMDSQ3 : CMDSQ3
bits : 2 - 2 (1 bit)
access : read-write
CMDSQ4 : CMDSQ4
bits : 3 - 3 (1 bit)
access : read-write
RAMSEL : RAMSEL
bits : 6 - 6 (1 bit)
access : read-write
DECMODE : DECMODE
bits : 7 - 7 (1 bit)
access : read-write
SNFC Interrupt Enable Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEQEN : SEQEN
bits : 0 - 0 (1 bit)
access : read-write
SEQFLG : SEQFLG
bits : 1 - 1 (1 bit)
access : read-only
SEQCLR : SEQCLR
bits : 2 - 2 (1 bit)
access : read-write
PRDEN : PRDEN
bits : 3 - 5 (3 bit)
access : read-write
PRDFLG : PRDFLG
bits : 6 - 6 (1 bit)
access : read-only
PRDCLR : PRDCLR
bits : 7 - 7 (1 bit)
access : read-write
RAMFEN : RAMFEN
bits : 8 - 16 (9 bit)
access : read-write
RAMFFLAG : RAMFFLAG
bits : 17 - 17 (1 bit)
access : read-only
RAMFCLR : RAMFCLR
bits : 18 - 18 (1 bit)
access : read-write
FAILEN : FAILEN
bits : 19 - 19 (1 bit)
access : read-write
FAILFLG : FAILFLG
bits : 20 - 20 (1 bit)
access : read-only
FAILCLR : FAILCLR
bits : 21 - 21 (1 bit)
access : read-write
SNFC Correction Data Read Buffer Register
address_offset : 0x800 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RDBUF : RDBUF
bits : 0 - 31 (32 bit)
access : read-only
SNFC Ecc Output Control Register
address_offset : 0x804 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
GOUT : GOUT
bits : 0 - 7 (8 bit)
access : read-only
GOUTEN : GOUTEN
bits : 8 - 8 (1 bit)
access : read-write
SNFC Ecc Busy Status Register
address_offset : 0x808 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
BSYST0 : BSYST0
bits : 0 - 0 (1 bit)
access : read-only
BSYST1 : BSYST1
bits : 1 - 1 (1 bit)
access : read-only
BSYST2 : BSYST2
bits : 2 - 2 (1 bit)
access : read-only
SNFC Ecc Error Status Register
address_offset : 0x820 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ERR1 : ERR1
bits : 0 - 0 (1 bit)
access : read-only
ERR2 : ERR2
bits : 1 - 1 (1 bit)
access : read-only
ERR3 : ERR3
bits : 2 - 2 (1 bit)
access : read-only
ERR4 : ERR4
bits : 3 - 3 (1 bit)
access : read-only
ERR5 : ERR5
bits : 4 - 4 (1 bit)
access : read-only
ERR6 : ERR6
bits : 5 - 5 (1 bit)
access : read-only
ERR7 : ERR7
bits : 6 - 6 (1 bit)
access : read-only
ERR8 : ERR8
bits : 7 - 7 (1 bit)
access : read-only
SNFC Ecc Decode State Register 1
address_offset : 0x840 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SERR : SERR
bits : 0 - 3 (4 bit)
access : read-only
ERRST0 : ERRST0
bits : 4 - 4 (1 bit)
access : read-only
ERRST1 : ERRST1
bits : 5 - 5 (1 bit)
access : read-only
ERRST2 : ERRST2
bits : 6 - 6 (1 bit)
access : read-only
ERRST3 : ERRST3
bits : 7 - 7 (1 bit)
access : read-only
DECST : DECST
bits : 8 - 9 (2 bit)
access : read-only
SNFC Ecc Decode State Register 2
address_offset : 0x844 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SERR : SERR
bits : 0 - 3 (4 bit)
access : read-only
ERRST0 : ERRST0
bits : 4 - 4 (1 bit)
access : read-only
ERRST1 : ERRST1
bits : 5 - 5 (1 bit)
access : read-only
ERRST2 : ERRST2
bits : 6 - 6 (1 bit)
access : read-only
ERRST3 : ERRST3
bits : 7 - 7 (1 bit)
access : read-only
DECST : DECST
bits : 8 - 9 (2 bit)
access : read-only
SNFC Ecc Decode State Register 3
address_offset : 0x848 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SERR : SERR
bits : 0 - 3 (4 bit)
access : read-only
ERRST0 : ERRST0
bits : 4 - 4 (1 bit)
access : read-only
ERRST1 : ERRST1
bits : 5 - 5 (1 bit)
access : read-only
ERRST2 : ERRST2
bits : 6 - 6 (1 bit)
access : read-only
ERRST3 : ERRST3
bits : 7 - 7 (1 bit)
access : read-only
DECST : DECST
bits : 8 - 9 (2 bit)
access : read-only
SNFC Ecc Decode State Register 4
address_offset : 0x84C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SERR : SERR
bits : 0 - 3 (4 bit)
access : read-only
ERRST0 : ERRST0
bits : 4 - 4 (1 bit)
access : read-only
ERRST1 : ERRST1
bits : 5 - 5 (1 bit)
access : read-only
ERRST2 : ERRST2
bits : 6 - 6 (1 bit)
access : read-only
ERRST3 : ERRST3
bits : 7 - 7 (1 bit)
access : read-only
DECST : DECST
bits : 8 - 9 (2 bit)
access : read-only
SNFC Ecc Decode State Register 5
address_offset : 0x850 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SERR : SERR
bits : 0 - 3 (4 bit)
access : read-only
ERRST0 : ERRST0
bits : 4 - 4 (1 bit)
access : read-only
ERRST1 : ERRST1
bits : 5 - 5 (1 bit)
access : read-only
ERRST2 : ERRST2
bits : 6 - 6 (1 bit)
access : read-only
ERRST3 : ERRST3
bits : 7 - 7 (1 bit)
access : read-only
DECST : DECST
bits : 8 - 9 (2 bit)
access : read-only
SNFC Ecc Decode State Register 6
address_offset : 0x854 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SERR : SERR
bits : 0 - 3 (4 bit)
access : read-only
ERRST0 : ERRST0
bits : 4 - 4 (1 bit)
access : read-only
ERRST1 : ERRST1
bits : 5 - 5 (1 bit)
access : read-only
ERRST2 : ERRST2
bits : 6 - 6 (1 bit)
access : read-only
ERRST3 : ERRST3
bits : 7 - 7 (1 bit)
access : read-only
DECST : DECST
bits : 8 - 9 (2 bit)
access : read-only
SNFC Ecc Decode State Register 7
address_offset : 0x858 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SERR : SERR
bits : 0 - 3 (4 bit)
access : read-only
ERRST0 : ERRST0
bits : 4 - 4 (1 bit)
access : read-only
ERRST1 : ERRST1
bits : 5 - 5 (1 bit)
access : read-only
ERRST2 : ERRST2
bits : 6 - 6 (1 bit)
access : read-only
ERRST3 : ERRST3
bits : 7 - 7 (1 bit)
access : read-only
DECST : DECST
bits : 8 - 9 (2 bit)
access : read-only
SNFC Ecc Decode State Register 8
address_offset : 0x85C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SERR : SERR
bits : 0 - 3 (4 bit)
access : read-only
ERRST0 : ERRST0
bits : 4 - 4 (1 bit)
access : read-only
ERRST1 : ERRST1
bits : 5 - 5 (1 bit)
access : read-only
ERRST2 : ERRST2
bits : 6 - 6 (1 bit)
access : read-only
ERRST3 : ERRST3
bits : 7 - 7 (1 bit)
access : read-only
DECST : DECST
bits : 8 - 9 (2 bit)
access : read-only
SNFC Sector 1 Ecc Error 1 Positional Information Register
address_offset : 0x880 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AADD1 : AADD1
bits : 0 - 12 (13 bit)
access : read-only
AADD2 : AADD2
bits : 16 - 28 (13 bit)
access : read-only
SNFC Sector 1 Ecc Error 2 Positional Information Register
address_offset : 0x884 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AADD3 : AADD3
bits : 0 - 12 (13 bit)
access : read-only
AADD4 : AADD4
bits : 16 - 28 (13 bit)
access : read-only
SNFC Sector 1 Ecc Error 3 Positional Information Register
address_offset : 0x888 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AADD5 : AADD5
bits : 0 - 12 (13 bit)
access : read-only
AADD6 : AADD6
bits : 16 - 28 (13 bit)
access : read-only
SNFC Sector 1 Ecc Error 4 Positional Information Register
address_offset : 0x88C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AADD7 : AADD7
bits : 0 - 12 (13 bit)
access : read-only
AADD8 : AADD8
bits : 16 - 28 (13 bit)
access : read-only
SNFC Sector 2 Ecc Error 1 Positional Information Register
address_offset : 0x890 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AADD1 : AADD1
bits : 0 - 12 (13 bit)
access : read-only
AADD2 : AADD2
bits : 16 - 28 (13 bit)
access : read-only
SNFC Sector 2 Ecc Error 2 Positional Information Register
address_offset : 0x894 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AADD3 : AADD3
bits : 0 - 12 (13 bit)
access : read-only
AADD4 : AADD4
bits : 16 - 28 (13 bit)
access : read-only
SNFC Sector 2 Ecc Error 3 Positional Information Register
address_offset : 0x898 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AADD5 : AADD5
bits : 0 - 12 (13 bit)
access : read-only
AADD6 : AADD6
bits : 16 - 28 (13 bit)
access : read-only
SNFC Sector 2 Ecc Error 4 Positional Information Register
address_offset : 0x89C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AADD7 : AADD7
bits : 0 - 12 (13 bit)
access : read-only
AADD8 : AADD8
bits : 16 - 28 (13 bit)
access : read-only
SNFC Sector 3 Ecc Error 1 Positional Information Register
address_offset : 0x8A0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AADD1 : AADD1
bits : 0 - 12 (13 bit)
access : read-only
AADD2 : AADD2
bits : 16 - 28 (13 bit)
access : read-only
SNFC Sector 3 Ecc Error 2 Positional Information Register
address_offset : 0x8A4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AADD3 : AADD3
bits : 0 - 12 (13 bit)
access : read-only
AADD4 : AADD4
bits : 16 - 28 (13 bit)
access : read-only
SNFC Sector 3 Ecc Error 3 Positional Information Register
address_offset : 0x8A8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AADD5 : AADD5
bits : 0 - 12 (13 bit)
access : read-only
AADD6 : AADD6
bits : 16 - 28 (13 bit)
access : read-only
SNFC Sector 3 Ecc Error 4 Positional Information Register
address_offset : 0x8AC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AADD7 : AADD7
bits : 0 - 12 (13 bit)
access : read-only
AADD8 : AADD8
bits : 16 - 28 (13 bit)
access : read-only
SNFC Sector 4 Ecc Error 1 Positional Information Register
address_offset : 0x8B0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AADD1 : AADD1
bits : 0 - 12 (13 bit)
access : read-only
AADD2 : AADD2
bits : 16 - 28 (13 bit)
access : read-only
SNFC Sector 4 Ecc Error 2 Positional Information Register
address_offset : 0x8B4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AADD3 : AADD3
bits : 0 - 12 (13 bit)
access : read-only
AADD4 : AADD4
bits : 16 - 28 (13 bit)
access : read-only
SNFC Sector 4 Ecc Error 3 Positional Information Register
address_offset : 0x8B8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AADD5 : AADD5
bits : 0 - 12 (13 bit)
access : read-only
AADD6 : AADD6
bits : 16 - 28 (13 bit)
access : read-only
SNFC Sector 4 Ecc Error 4 Positional Information Register
address_offset : 0x8BC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AADD7 : AADD7
bits : 0 - 12 (13 bit)
access : read-only
AADD8 : AADD8
bits : 16 - 28 (13 bit)
access : read-only
SNFC Sector 5 Ecc Error 1 Positional Information Register
address_offset : 0x8C0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AADD1 : AADD1
bits : 0 - 12 (13 bit)
access : read-only
AADD2 : AADD2
bits : 16 - 28 (13 bit)
access : read-only
SNFC Sector 5 Ecc Error 2 Positional Information Register
address_offset : 0x8C4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AADD3 : AADD3
bits : 0 - 12 (13 bit)
access : read-only
AADD4 : AADD4
bits : 16 - 28 (13 bit)
access : read-only
SNFC Sector 5 Ecc Error 3 Positional Information Register
address_offset : 0x8C8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AADD5 : AADD5
bits : 0 - 12 (13 bit)
access : read-only
AADD6 : AADD6
bits : 16 - 28 (13 bit)
access : read-only
SNFC Sector 5 Ecc Error 4 Positional Information Register
address_offset : 0x8CC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AADD7 : AADD7
bits : 0 - 12 (13 bit)
access : read-only
AADD8 : AADD8
bits : 16 - 28 (13 bit)
access : read-only
SNFC Sector 6 Ecc Error 1 Positional Information Register
address_offset : 0x8D0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AADD1 : AADD1
bits : 0 - 12 (13 bit)
access : read-only
AADD2 : AADD2
bits : 16 - 28 (13 bit)
access : read-only
SNFC Sector 6 Ecc Error 2 Positional Information Register
address_offset : 0x8D4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AADD3 : AADD3
bits : 0 - 12 (13 bit)
access : read-only
AADD4 : AADD4
bits : 16 - 28 (13 bit)
access : read-only
SNFC Sector 6 Ecc Error 3 Positional Information Register
address_offset : 0x8D8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AADD5 : AADD5
bits : 0 - 12 (13 bit)
access : read-only
AADD6 : AADD6
bits : 16 - 28 (13 bit)
access : read-only
SNFC Sector 6 Ecc Error 4 Positional Information Register
address_offset : 0x8DC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AADD7 : AADD7
bits : 0 - 12 (13 bit)
access : read-only
AADD8 : AADD8
bits : 16 - 28 (13 bit)
access : read-only
SNFC Sector 7 Ecc Error 1 Positional Information Register
address_offset : 0x8E0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AADD1 : AADD1
bits : 0 - 12 (13 bit)
access : read-only
AADD2 : AADD2
bits : 16 - 28 (13 bit)
access : read-only
SNFC Sector 7 Ecc Error 2 Positional Information Register
address_offset : 0x8E4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AADD3 : AADD3
bits : 0 - 12 (13 bit)
access : read-only
AADD4 : AADD4
bits : 16 - 28 (13 bit)
access : read-only
SNFC Sector 7 Ecc Error 3 Positional Information Register
address_offset : 0x8E8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AADD5 : AADD5
bits : 0 - 12 (13 bit)
access : read-only
AADD6 : AADD6
bits : 16 - 28 (13 bit)
access : read-only
SNFC Sector 7 Ecc Error 4 Positional Information Register
address_offset : 0x8EC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AADD7 : AADD7
bits : 0 - 12 (13 bit)
access : read-only
AADD8 : AADD8
bits : 16 - 28 (13 bit)
access : read-only
SNFC Sector 8 Ecc Error 1 Positional Information Register
address_offset : 0x8F0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AADD1 : AADD1
bits : 0 - 12 (13 bit)
access : read-only
AADD2 : AADD2
bits : 16 - 28 (13 bit)
access : read-only
SNFC Sector 8 Ecc Error 2 Positional Information Register
address_offset : 0x8F4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AADD3 : AADD3
bits : 0 - 12 (13 bit)
access : read-only
AADD4 : AADD4
bits : 16 - 28 (13 bit)
access : read-only
SNFC Sector 8 Ecc Error 3 Positional Information Register
address_offset : 0x8F8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AADD5 : AADD5
bits : 0 - 12 (13 bit)
access : read-only
AADD6 : AADD6
bits : 16 - 28 (13 bit)
access : read-only
SNFC Sector 8 Ecc Error 4 Positional Information Register
address_offset : 0x8FC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AADD7 : AADD7
bits : 0 - 12 (13 bit)
access : read-only
AADD8 : AADD8
bits : 16 - 28 (13 bit)
access : read-only
Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !
This website is sponsored by Embeetle, an IDE designed from scratch for embedded software developers.