\n

PD

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x38 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0xC Bytes (0x0)
size : 0x1C byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x28 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x30 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : reserved
protection : not protected

Registers

DATA

OD

PUP

IE

CR

FR1


DATA

Port D Data Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA DATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PD0 PD1 PD2 PD3 PD4

PD0 : PD0
bits : 0 - 0 (1 bit)
access : read-write

PD1 : PD1
bits : 1 - 1 (1 bit)
access : read-write

PD2 : PD2
bits : 2 - 2 (1 bit)
access : read-write

PD3 : PD3
bits : 3 - 3 (1 bit)
access : read-write

PD4 : PD4
bits : 4 - 4 (1 bit)
access : read-write


OD

Port D Open Drain Control Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OD OD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PD0OD PD1OD PD2OD PD3OD PD4OD

PD0OD : PD0OD
bits : 0 - 0 (1 bit)
access : read-write

PD1OD : PD1OD
bits : 1 - 1 (1 bit)
access : read-write

PD2OD : PD2OD
bits : 2 - 2 (1 bit)
access : read-write

PD3OD : PD3OD
bits : 3 - 3 (1 bit)
access : read-write

PD4OD : PD4OD
bits : 4 - 4 (1 bit)
access : read-write


PUP

Port D Pull-up Control Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PUP PUP read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PD0UP PD1UP PD2UP PD3UP PD4UP

PD0UP : PD0UP
bits : 0 - 0 (1 bit)
access : read-write

PD1UP : PD1UP
bits : 1 - 1 (1 bit)
access : read-write

PD2UP : PD2UP
bits : 2 - 2 (1 bit)
access : read-write

PD3UP : PD3UP
bits : 3 - 3 (1 bit)
access : read-write

PD4UP : PD4UP
bits : 4 - 4 (1 bit)
access : read-write


IE

Port D Input Control Register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IE IE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PD0IE PD1IE PD2IE PD3IE PD4IE

PD0IE : PD0IE
bits : 0 - 0 (1 bit)
access : read-write

PD1IE : PD1IE
bits : 1 - 1 (1 bit)
access : read-write

PD2IE : PD2IE
bits : 2 - 2 (1 bit)
access : read-write

PD3IE : PD3IE
bits : 3 - 3 (1 bit)
access : read-write

PD4IE : PD4IE
bits : 4 - 4 (1 bit)
access : read-write


CR

Port D Output Control Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CR CR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PD0C PD1C PD2C PD3C PD4C

PD0C : PD0C
bits : 0 - 0 (1 bit)
access : read-write

PD1C : PD1C
bits : 1 - 1 (1 bit)
access : read-write

PD2C : PD2C
bits : 2 - 2 (1 bit)
access : read-write

PD3C : PD3C
bits : 3 - 3 (1 bit)
access : read-write

PD4C : PD4C
bits : 4 - 4 (1 bit)
access : read-write


FR1

Port D Function Register 1
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FR1 FR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PD0F1 PD1F1 PD2F1 PD3F1 PD4F1

PD0F1 : PD0F1
bits : 0 - 0 (1 bit)
access : read-write

PD1F1 : PD1F1
bits : 1 - 1 (1 bit)
access : read-write

PD2F1 : PD2F1
bits : 2 - 2 (1 bit)
access : read-write

PD3F1 : PD3F1
bits : 3 - 3 (1 bit)
access : read-write

PD4F1 : PD4F1
bits : 4 - 4 (1 bit)
access : read-write



Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !

This website is sponsored by EmbeetleEmbeetle, an IDE designed from scratch for embedded software developers.