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PH

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x18 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x38 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x28 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x30 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x18 Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : reserved
protection : not protected

Registers

DATA

FR3

FR4

OD

PUP

IE

CR

FR1

FR2


DATA

Port H Data Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA DATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PH0 PH1 PH2 PH3

PH0 : PH0
bits : 0 - 0 (1 bit)
access : read-write

PH1 : PH1
bits : 1 - 1 (1 bit)
access : read-write

PH2 : PH2
bits : 2 - 2 (1 bit)
access : read-write

PH3 : PH3
bits : 3 - 3 (1 bit)
access : read-write


FR3

Port H Function Register 3
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FR3 FR3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PH0F3 PH1F3 PH2F3 PH3F3

PH0F3 : PH0F3
bits : 0 - 0 (1 bit)
access : read-write

PH1F3 : PH1F3
bits : 1 - 1 (1 bit)
access : read-write

PH2F3 : PH2F3
bits : 2 - 2 (1 bit)
access : read-write

PH3F3 : PH3F3
bits : 3 - 3 (1 bit)
access : read-write


FR4

Port H Function Register 4
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FR4 FR4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PH0F4 PH1F4 PH2F4 PH3F4

PH0F4 : PH0F4
bits : 0 - 0 (1 bit)
access : read-write

PH1F4 : PH1F4
bits : 1 - 1 (1 bit)
access : read-write

PH2F4 : PH2F4
bits : 2 - 2 (1 bit)
access : read-write

PH3F4 : PH3F4
bits : 3 - 3 (1 bit)
access : read-write


OD

Port H Open Drain Control Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OD OD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PH0OD PH1OD PH2OD PH3OD

PH0OD : PH0OD
bits : 0 - 0 (1 bit)
access : read-write

PH1OD : PH1OD
bits : 1 - 1 (1 bit)
access : read-write

PH2OD : PH2OD
bits : 2 - 2 (1 bit)
access : read-write

PH3OD : PH3OD
bits : 3 - 3 (1 bit)
access : read-write


PUP

Port H Pull-up Control Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PUP PUP read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PH0UP PH1UP PH2UP PH3UP

PH0UP : PH0UP
bits : 0 - 0 (1 bit)
access : read-write

PH1UP : PH1UP
bits : 1 - 1 (1 bit)
access : read-write

PH2UP : PH2UP
bits : 2 - 2 (1 bit)
access : read-write

PH3UP : PH3UP
bits : 3 - 3 (1 bit)
access : read-write


IE

Port H Input Control Register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IE IE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PH0IE PH1IE PH2IE PH3IE

PH0IE : PH0IE
bits : 0 - 0 (1 bit)
access : read-write

PH1IE : PH1IE
bits : 1 - 1 (1 bit)
access : read-write

PH2IE : PH2IE
bits : 2 - 2 (1 bit)
access : read-write

PH3IE : PH3IE
bits : 3 - 3 (1 bit)
access : read-write


CR

Port H Output Control Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CR CR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PH0C PH1C PH2C PH3C

PH0C : PH0C
bits : 0 - 0 (1 bit)
access : read-write

PH1C : PH1C
bits : 1 - 1 (1 bit)
access : read-write

PH2C : PH2C
bits : 2 - 2 (1 bit)
access : read-write

PH3C : PH3C
bits : 3 - 3 (1 bit)
access : read-write


FR1

Port H Function Register 1
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FR1 FR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PH0F1 PH1F1 PH2F1 PH3F1

PH0F1 : PH0F1
bits : 0 - 0 (1 bit)
access : read-write

PH1F1 : PH1F1
bits : 1 - 1 (1 bit)
access : read-write

PH2F1 : PH2F1
bits : 2 - 2 (1 bit)
access : read-write

PH3F1 : PH3F1
bits : 3 - 3 (1 bit)
access : read-write


FR2

Port H Function Register 2
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FR2 FR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PH0F2 PH1F2

PH0F2 : PH0F2
bits : 0 - 0 (1 bit)
access : read-write

PH1F2 : PH1F2
bits : 1 - 1 (1 bit)
access : read-write



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