\n

FC

Peripheral Memory Blocks

address_offset : 0x10 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x20 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x30 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x100 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x0 Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x14 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x34 Bytes (0x0)
size : 0xCC byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x140 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x24 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x108 Bytes (0x0)
size : 0x38 byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x144 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x148 Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection : not protected

Registers

SECBIT

SR

SWPSR

AREASEL

CR

STSCLR

WCLKCR

PROGCR

ERASECR

PSR0

PSR1


SECBIT

Security Bit Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SECBIT SECBIT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SECBIT

SECBIT : SECBIT
bits : 0 - 0 (1 bit)
access : read-write


SR

Status Register
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

SR SR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WEABORT

WEABORT : WEABORT
bits : 24 - 24 (1 bit)
access : read-only


SWPSR

Swap Status Register
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

SWPSR SWPSR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SWP FLG SIZE

SWP : SWP
bits : 0 - 1 (2 bit)
access : read-only

FLG : FLG
bits : 2 - 7 (6 bit)
access : read-only

SIZE : SIZE
bits : 8 - 10 (3 bit)
access : read-only


AREASEL

Area Selection Register
address_offset : 0x140 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AREASEL AREASEL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AREA0 AREA1

AREA0 : AREA0
bits : 0 - 2 (3 bit)
access : read-write

AREA1 : AREA1
bits : 4 - 6 (3 bit)
access : read-write


CR

Control Register
address_offset : 0x148 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CR CR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WEABORT

WEABORT : WEABORT
bits : 0 - 2 (3 bit)
access : read-write


STSCLR

Status Clear Register
address_offset : 0x14C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

STSCLR STSCLR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WEABORT

WEABORT : WEABORT
bits : 0 - 2 (3 bit)
access : read-write


WCLKCR

WCLK Configuration Register
address_offset : 0x150 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WCLKCR WCLKCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DIV

DIV : DIV
bits : 0 - 4 (5 bit)
access : read-write


PROGCR

Program Counter Configuration Register
address_offset : 0x154 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PROGCR PROGCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CNT

CNT : CNT
bits : 0 - 1 (2 bit)
access : read-write


ERASECR

Erase Counter Configuration Register
address_offset : 0x158 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ERASECR ERASECR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CNT

CNT : CNT
bits : 0 - 3 (4 bit)
access : read-write


PSR0

Protect Status Register 0
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PSR0 PSR0 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RDY_BSY PG0 PG1 PG2 PG3 PG4 PG5 PG6 PG7 BLK1 BLK2 BLK3 BLK4 BLK5 BLK6 BLK7 BLK8 BLK9 BLK10 BLK11 BLK12 BLK13 BLK14 BLK15

RDY_BSY : RDY_BSY
bits : 0 - 0 (1 bit)
access : read-only

PG0 : PG0
bits : 8 - 8 (1 bit)
access : read-only

PG1 : PG1
bits : 9 - 9 (1 bit)
access : read-only

PG2 : PG2
bits : 10 - 10 (1 bit)
access : read-only

PG3 : PG3
bits : 11 - 11 (1 bit)
access : read-only

PG4 : PG4
bits : 12 - 12 (1 bit)
access : read-only

PG5 : PG5
bits : 13 - 13 (1 bit)
access : read-only

PG6 : PG6
bits : 14 - 14 (1 bit)
access : read-only

PG7 : PG7
bits : 15 - 15 (1 bit)
access : read-only

BLK1 : BLK1
bits : 17 - 17 (1 bit)
access : read-only

BLK2 : BLK2
bits : 18 - 18 (1 bit)
access : read-only

BLK3 : BLK3
bits : 19 - 19 (1 bit)
access : read-only

BLK4 : BLK4
bits : 20 - 20 (1 bit)
access : read-only

BLK5 : BLK5
bits : 21 - 21 (1 bit)
access : read-only

BLK6 : BLK6
bits : 22 - 22 (1 bit)
access : read-only

BLK7 : BLK7
bits : 23 - 23 (1 bit)
access : read-only

BLK8 : BLK8
bits : 24 - 24 (1 bit)
access : read-only

BLK9 : BLK9
bits : 25 - 25 (1 bit)
access : read-only

BLK10 : BLK10
bits : 26 - 26 (1 bit)
access : read-only

BLK11 : BLK11
bits : 27 - 27 (1 bit)
access : read-only

BLK12 : BLK12
bits : 28 - 28 (1 bit)
access : read-only

BLK13 : BLK13
bits : 29 - 29 (1 bit)
access : read-only

BLK14 : BLK14
bits : 30 - 30 (1 bit)
access : read-only

BLK15 : BLK15
bits : 31 - 31 (1 bit)
access : read-only


PSR1

Protect Status Register 1
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PSR1 PSR1 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BLK16 BLK17 BLK18 BLK19 BLK20 BLK21 BLK22 BLK23 BLK24 BLK25 BLK26 BLK27 BLK28 BLK29 BLK30 BLK31

BLK16 : BLK16
bits : 16 - 16 (1 bit)
access : read-only

BLK17 : BLK17
bits : 17 - 17 (1 bit)
access : read-only

BLK18 : BLK18
bits : 18 - 18 (1 bit)
access : read-only

BLK19 : BLK19
bits : 19 - 19 (1 bit)
access : read-only

BLK20 : BLK20
bits : 20 - 20 (1 bit)
access : read-only

BLK21 : BLK21
bits : 21 - 21 (1 bit)
access : read-only

BLK22 : BLK22
bits : 22 - 22 (1 bit)
access : read-only

BLK23 : BLK23
bits : 23 - 23 (1 bit)
access : read-only

BLK24 : BLK24
bits : 24 - 24 (1 bit)
access : read-only

BLK25 : BLK25
bits : 25 - 25 (1 bit)
access : read-only

BLK26 : BLK26
bits : 26 - 26 (1 bit)
access : read-only

BLK27 : BLK27
bits : 27 - 27 (1 bit)
access : read-only

BLK28 : BLK28
bits : 28 - 28 (1 bit)
access : read-only

BLK29 : BLK29
bits : 29 - 29 (1 bit)
access : read-only

BLK30 : BLK30
bits : 30 - 30 (1 bit)
access : read-only

BLK31 : BLK31
bits : 31 - 31 (1 bit)
access : read-only



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