\n
address_offset : 0x0 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x20 Bytes (0x0)
size : 0x20 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x1 Bytes (0x0)
size : 0x1F byte (0x0)
mem_usage : reserved
protection : not protected
address_offset : 0x40 Bytes (0x0)
size : 0x11 byte (0x0)
mem_usage : reserved
protection : not protected
address_offset : 0x51 Bytes (0x0)
size : 0x9 byte (0x0)
mem_usage : registers
protection : not protected
Non Maskable Interrupu Mode Control Register A 00
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 00
address_offset : 0x20 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 01
address_offset : 0x21 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 02
address_offset : 0x22 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 03
address_offset : 0x23 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 04
address_offset : 0x24 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 05
address_offset : 0x25 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 06
address_offset : 0x26 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 07
address_offset : 0x27 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 08
address_offset : 0x28 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 09
address_offset : 0x29 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 10
address_offset : 0x2A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 11
address_offset : 0x2B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 12
address_offset : 0x2C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 13
address_offset : 0x2D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 14
address_offset : 0x2E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 15
address_offset : 0x2F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 16
address_offset : 0x30 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 17
address_offset : 0x31 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 18
address_offset : 0x32 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 19
address_offset : 0x33 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 20
address_offset : 0x34 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 21
address_offset : 0x35 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 22
address_offset : 0x36 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 23
address_offset : 0x37 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 24
address_offset : 0x38 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 25
address_offset : 0x39 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 26
address_offset : 0x3A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 27
address_offset : 0x3B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 28
address_offset : 0x3C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 29
address_offset : 0x3D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 30
address_offset : 0x3E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 31
address_offset : 0x3F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 49
address_offset : 0x51 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 50
address_offset : 0x52 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 51
address_offset : 0x53 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 52
address_offset : 0x54 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 53
address_offset : 0x55 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 54
address_offset : 0x56 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 55
address_offset : 0x57 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 56
address_offset : 0x58 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
Interrupu Mode Control Register A 57
address_offset : 0x59 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write
INTMODE : INTMODE
bits : 1 - 3 (3 bit)
access : read-write
INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-only
INTNFLG : INTNFLG
bits : 5 - 5 (1 bit)
access : read-only
INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only
INTNCLR : INTNCLR
bits : 7 - 7 (1 bit)
access : write-only
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