\n
address_offset : 0x0 Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection : not protected
RAM Parity control register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RPAREN : RPAREN
bits : 0 - 0 (1 bit)
access : read-write
RPARF : RPARF
bits : 1 - 1 (1 bit)
access : read-write
RAM Parity Error address register 1
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RPAREADD1 : RPAREADD1
bits : 0 - 31 (32 bit)
access : read-only
RAM Parity status register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RPARFG0 : RPARFG0
bits : 0 - 0 (1 bit)
access : read-only
RPARFG1 : RPARFG1
bits : 1 - 1 (1 bit)
access : read-only
RAM Parity status clear register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
RPARCLR0 : RPARCLR0
bits : 0 - 0 (1 bit)
access : write-only
RPARCLR1 : RPARCLR1
bits : 1 - 1 (1 bit)
access : write-only
RAM Parity Error address register 0
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RPAREADD0 : RPAREADD0
bits : 0 - 31 (32 bit)
access : read-only
Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !
This website is sponsored by Embeetle, an IDE designed from scratch for embedded software developers.