\n

PA

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x38 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x28 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x34 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x24 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x14 Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0xC Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : reserved
protection : not protected

Registers

DATA

FR4

FR5

FR6

FR7

OD

PUP

PDN

IE

CR

FR1


DATA

Port A Data Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA DATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PA0 PA1 PA2 PA3 PA4

PA0 : PA0
bits : 0 - 0 (1 bit)
access : read-write

PA1 : PA1
bits : 1 - 1 (1 bit)
access : read-write

PA2 : PA2
bits : 2 - 2 (1 bit)
access : read-write

PA3 : PA3
bits : 3 - 3 (1 bit)
access : read-write

PA4 : PA4
bits : 4 - 4 (1 bit)
access : read-write


FR4

Port A Function Register 4
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FR4 FR4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PA0F4 PA1F4 PA2F4 PA3F4 PA4F4

PA0F4 : PA0F4
bits : 0 - 0 (1 bit)
access : read-write

PA1F4 : PA1F4
bits : 1 - 1 (1 bit)
access : read-write

PA2F4 : PA2F4
bits : 2 - 2 (1 bit)
access : read-write

PA3F4 : PA3F4
bits : 3 - 3 (1 bit)
access : read-write

PA4F4 : PA4F4
bits : 4 - 4 (1 bit)
access : read-write


FR5

Port A Function Register 5
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FR5 FR5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PA2F5 PA3F5

PA2F5 : PA2F5
bits : 2 - 2 (1 bit)
access : read-write

PA3F5 : PA3F5
bits : 3 - 3 (1 bit)
access : read-write


FR6

Port A Function Register 6
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FR6 FR6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PA2F6

PA2F6 : PA2F6
bits : 2 - 2 (1 bit)
access : read-write


FR7

Port A Function Register 7
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FR7 FR7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PA2F7 PA3F7 PA4F7

PA2F7 : PA2F7
bits : 2 - 2 (1 bit)
access : read-write

PA3F7 : PA3F7
bits : 3 - 3 (1 bit)
access : read-write

PA4F7 : PA4F7
bits : 4 - 4 (1 bit)
access : read-write


OD

Port A Open Drain Control Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OD OD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PA0OD PA1OD PA2OD PA3OD PA4OD

PA0OD : PA0OD
bits : 0 - 0 (1 bit)
access : read-write

PA1OD : PA1OD
bits : 1 - 1 (1 bit)
access : read-write

PA2OD : PA2OD
bits : 2 - 2 (1 bit)
access : read-write

PA3OD : PA3OD
bits : 3 - 3 (1 bit)
access : read-write

PA4OD : PA4OD
bits : 4 - 4 (1 bit)
access : read-write


PUP

Port A Pull-up Control Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PUP PUP read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PA0UP PA1UP PA2UP PA3UP PA4UP

PA0UP : PA0UP
bits : 0 - 0 (1 bit)
access : read-write

PA1UP : PA1UP
bits : 1 - 1 (1 bit)
access : read-write

PA2UP : PA2UP
bits : 2 - 2 (1 bit)
access : read-write

PA3UP : PA3UP
bits : 3 - 3 (1 bit)
access : read-write

PA4UP : PA4UP
bits : 4 - 4 (1 bit)
access : read-write


PDN

Port A Pull-down Control Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PDN PDN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PA0DN PA1DN PA2DN PA3DN PA4DN

PA0DN : PA0DN
bits : 0 - 0 (1 bit)
access : read-write

PA1DN : PA1DN
bits : 1 - 1 (1 bit)
access : read-write

PA2DN : PA2DN
bits : 2 - 2 (1 bit)
access : read-write

PA3DN : PA3DN
bits : 3 - 3 (1 bit)
access : read-write

PA4DN : PA4DN
bits : 4 - 4 (1 bit)
access : read-write


IE

Port A Input Control Register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IE IE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PA0IE PA1IE PA2IE PA3IE PA4IE

PA0IE : PA0IE
bits : 0 - 0 (1 bit)
access : read-write

PA1IE : PA1IE
bits : 1 - 1 (1 bit)
access : read-write

PA2IE : PA2IE
bits : 2 - 2 (1 bit)
access : read-write

PA3IE : PA3IE
bits : 3 - 3 (1 bit)
access : read-write

PA4IE : PA4IE
bits : 4 - 4 (1 bit)
access : read-write


CR

Port A Output Control Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CR CR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PA0C PA1C PA2C PA3C PA4C

PA0C : PA0C
bits : 0 - 0 (1 bit)
access : read-write

PA1C : PA1C
bits : 1 - 1 (1 bit)
access : read-write

PA2C : PA2C
bits : 2 - 2 (1 bit)
access : read-write

PA3C : PA3C
bits : 3 - 3 (1 bit)
access : read-write

PA4C : PA4C
bits : 4 - 4 (1 bit)
access : read-write


FR1

Port A Function Register 1
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FR1 FR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PA0F1 PA1F1 PA2F1 PA3F1 PA4F1

PA0F1 : PA0F1
bits : 0 - 0 (1 bit)
access : read-write

PA1F1 : PA1F1
bits : 1 - 1 (1 bit)
access : read-write

PA2F1 : PA2F1
bits : 2 - 2 (1 bit)
access : read-write

PA3F1 : PA3F1
bits : 3 - 3 (1 bit)
access : read-write

PA4F1 : PA4F1
bits : 4 - 4 (1 bit)
access : read-write



Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !

This website is sponsored by EmbeetleEmbeetle, an IDE designed from scratch for embedded software developers.