\n
address_offset : 0x0 Bytes (0x0)
size : 0x18 byte (0x0)
mem_usage : registers
protection : not protected
SIWD Protect Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROTECT : PROTECT
bits : 0 - 7 (8 bit)
access : read-write
SIWD Count Monitor Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
MONI : MONI
bits : 0 - 29 (30 bit)
access : read-only
SIWD Oscillator Control Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OSCPRO : OSCPRO
bits : 0 - 0 (1 bit)
access : read-write
SIWD Enable Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WDTE : WDTE
bits : 0 - 0 (1 bit)
access : read-write
WDTF : WDTF
bits : 1 - 1 (1 bit)
access : read-only
SIWD Control Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
WDCR : WDCR
bits : 0 - 7 (8 bit)
access : write-only
SIWD Mode Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RESCR : RESCR
bits : 0 - 0 (1 bit)
access : read-write
INTF : INTF
bits : 1 - 1 (1 bit)
access : read-write
WDCWD : WDCWD
bits : 4 - 5 (2 bit)
access : read-write
WDTP : WDTP
bits : 8 - 10 (3 bit)
access : read-write
WDCLS : WDCLS
bits : 12 - 13 (2 bit)
access : read-write
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