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GPADC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x20 byte (0x0)
mem_usage : registers
protection : not protected

Registers

GPADCC_CTRL

GPADCC_INTCLR

GPADCC_STATE

GPADCC_BUSYMASK

GPADCC_SELAIN

GPADCC_DATA

GPADCC_INTMASK


GPADCC_CTRL

GPADC control
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPADCC_CTRL GPADCC_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Soc Reset CoreOn Pd ClkAuto ClkOn Cont DMAEN MODE TimerSoc

Soc : SOC output
bits : 0 - 0 (1 bit)
access : read-write

Reset : Reset Signal select
bits : 1 - 2 (2 bit)
access : read-write

CoreOn : CoreOn signal select
bits : 2 - 4 (3 bit)
access : read-write

Pd : Power Down signal select
bits : 3 - 6 (4 bit)
access : read-write

ClkAuto : Automatic clock supply On/Off
bits : 4 - 8 (5 bit)
access : read-write

ClkOn : Clock On/Off
bits : 5 - 10 (6 bit)
access : read-write

Cont : GPADC characteristic register
bits : 6 - 19 (14 bit)
access : read-write

DMAEN : DMA Enable/Disable
bits : 16 - 32 (17 bit)
access : read-write

MODE : Single/Continuous ADC select
bits : 17 - 34 (18 bit)
access : read-write

TimerSoc : Periodic ADC feature
bits : 20 - 40 (21 bit)
access : read-write


GPADCC_INTCLR

GPADC Interrupt clear register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPADCC_INTCLR GPADCC_INTCLR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IntClr

IntClr : Clear Interrupt
bits : 0 - 0 (1 bit)
access : read-write


GPADCC_STATE

GPADC state register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPADCC_STATE GPADCC_STATE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Int G_EOC

Int : Interrupt
bits : 0 - 0 (1 bit)
access : read-write

G_EOC : End of Conversion
bits : 1 - 2 (2 bit)
access : read-write


GPADCC_BUSYMASK

GPADC Busy signal mask setting
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPADCC_BUSYMASK GPADCC_BUSYMASK read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BusyMask

BusyMask : Busy Mask
bits : 0 - 0 (1 bit)
access : read-write


GPADCC_SELAIN

Select ADC input channel
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPADCC_SELAIN GPADCC_SELAIN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SelAin

SelAin : Analog input channel select
bits : 0 - 3 (4 bit)
access : read-write


GPADCC_DATA

ADC Conversion Data Read register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPADCC_DATA GPADCC_DATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 G_D

G_D : G_D
bits : 0 - 11 (12 bit)
access : read-write


GPADCC_INTMASK

GPADC interrupt mask
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPADCC_INTMASK GPADCC_INTMASK read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IntMask

IntMask : Interrupt mask
bits : 0 - 0 (1 bit)
access : read-write



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