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TimerBCG

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x200 byte (0x0)
mem_usage : registers
protection : not protected

Registers

TIM_BCTIMER_CTRL

TIM_BCTIMER_C

TIM_GTIMER_CTRL

TIM_GTIMER_STAT

TIM_GTIMER_A

TIM_GTIMER_A_RD

TIM_BCTIMER_A_RD

TIM_BCTIMER_B_RD

TIM_BCTIMER_C_RD

TIM_BCTIMER_STAT

TIM_BCTIMER_A

TIM_BCTIMER_B


TIM_BCTIMER_CTRL

Bit Clock Timer Control
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIM_BCTIMER_CTRL TIM_BCTIMER_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AEn BEn CEn INTMA INTMB INTMC

AEn : Enable autoreload feature for timer A. 0: Stop when Timer A gets 0. 1: Reload the initial value when Timer A gets 0.
bits : 0 - 0 (1 bit)
access : read-write

BEn : Enable autoreload feature for timer B. 0: Stop when Timer B gets 0. 1: Reload the initial value when Timer B gets 0.
bits : 1 - 2 (2 bit)
access : read-write

CEn : Enable autoreload feature for timer C. 0: Stop when Timer C gets 0. 1: Reload the initial value when Timer C gets 0.
bits : 2 - 4 (3 bit)
access : read-write

INTMA : Timer A Interrupt mask. 0: the interrupt is not masked. 1: the interutpt is masked
bits : 8 - 16 (9 bit)
access : read-write

INTMB : Timer B Interrupt mask. 0: the interrupt is not masked. 1: the interutpt is masked
bits : 9 - 18 (10 bit)
access : read-write

INTMC : Timer C Interrupt mask. 0: the interrupt is not masked. 1: the interutpt is masked
bits : 10 - 20 (11 bit)
access : read-write


TIM_BCTIMER_C

Bit Clock Timer C control
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIM_BCTIMER_C TIM_BCTIMER_C read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TimC

TimC : Start Value Timer C. Set the initial value of Timer C.
bits : 0 - 15 (16 bit)
access : read-write


TIM_GTIMER_CTRL

Timer Control
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIM_GTIMER_CTRL TIM_GTIMER_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AEn INTMA PRESCALERVAL

AEn : Enable auto reload feature for Timer A
bits : 0 - 0 (1 bit)
access : read-write

INTMA : Timer A Interrupt mask. 0: the interrupt is not masked. 1: the interutpt is masked
bits : 8 - 16 (9 bit)
access : read-write

PRESCALERVAL : Settings for frequency divider of TimerSCLK to generate timer clock. 0x000 : No divide. 0x001 : 1/2. 0x002 : 1/3. ........ 0xfff : 1/4096
bits : 16 - 43 (28 bit)
access : read-write


TIM_GTIMER_STAT

Timer Status
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIM_GTIMER_STAT TIM_GTIMER_STAT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TimerAInt

TimerAInt : Interrutp bit from Timer A. 0: No interrupt from Timer A. 1: Interrupt from Timer A exist.
bits : 0 - 0 (1 bit)
access : read-write


TIM_GTIMER_A

Timer Initial Value
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIM_GTIMER_A TIM_GTIMER_A read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TimA

TimA : Start Value of TimerA.
bits : 0 - 15 (16 bit)
access : read-write


TIM_GTIMER_A_RD

Timer Value read
address_offset : 0x114 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIM_GTIMER_A_RD TIM_GTIMER_A_RD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TimerARd

TimerARd : Current Value of Timer A.
bits : 0 - 15 (16 bit)
access : read-write


TIM_BCTIMER_A_RD

Bit Clock Timer A read
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIM_BCTIMER_A_RD TIM_BCTIMER_A_RD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TimARd

TimARd : Current Value of Timer A
bits : 0 - 15 (16 bit)
access : read-write


TIM_BCTIMER_B_RD

Bit Clock Timer B read
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIM_BCTIMER_B_RD TIM_BCTIMER_B_RD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TimBRd

TimBRd : Current Value of Timer B
bits : 0 - 15 (16 bit)
access : read-write


TIM_BCTIMER_C_RD

Bit Clock Timer C read
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIM_BCTIMER_C_RD TIM_BCTIMER_C_RD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TimCRd

TimCRd : Current Value of Timer C
bits : 0 - 15 (16 bit)
access : read-write


TIM_BCTIMER_STAT

Bit Clock Timer Status
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIM_BCTIMER_STAT TIM_BCTIMER_STAT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TimerAInt TimerBInt TimerCInt

TimerAInt : Interrupt from Timer A. 0: No interrupt from Timer A. 1: Interrupt from Timer A exist.
bits : 0 - 0 (1 bit)
access : read-write

TimerBInt : Interrupt from Timer B. 0: No interrupt from Timer B. 1: Interrupt from Timer B exist.
bits : 1 - 2 (2 bit)
access : read-write

TimerCInt : Interrupt from Timer C. 0: No interrupt from Timer C. 1: Interrupt from Timer C exist.
bits : 2 - 4 (3 bit)
access : read-write


TIM_BCTIMER_A

Bit Clock Timer A control
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIM_BCTIMER_A TIM_BCTIMER_A read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TimA

TimA : Start Value Timer A. Set the initial value of Timer A.
bits : 0 - 15 (16 bit)
access : read-write


TIM_BCTIMER_B

Bit Clock Timer B control
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIM_BCTIMER_B TIM_BCTIMER_B read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TimB

TimB : Start Value Timer B. Set the initial value of Timer B.
bits : 0 - 15 (16 bit)
access : read-write



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