\n
address_offset : 0x0 Bytes (0x0)
size : 0x20 byte (0x0)
mem_usage : registers
protection : not protected
Timer n Control Register 1
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MODE : Timer operatin mode control
bits : 0 - 1 (2 bit)
CLRMD : clear select when capture mode
bits : 2 - 3 (2 bit)
CKSEL : counter clock source select
bits : 4 - 6 (3 bit)
STARTLVL : Timer output polarity control
bits : 7 - 7 (1 bit)
ADCTRGEN : ADCTRGEN
bits : 8 - 8 (1 bit)
OUTPOL : Timer ouput Polarity
bits : 12 - 12 (1 bit)
UAO : Select GRA, GRB update mode
bits : 13 - 13 (1 bit)
CSYNC : Synchronized clear counter with other synchronized timers
bits : 14 - 14 (1 bit)
SSYNC : Synchronized start counter with other synchronized timers
bits : 15 - 15 (1 bit)
Timer n General Register B
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GRB : GRB
bits : 0 - 15 (16 bit)
Timer n Count Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CNT : CNT
bits : 0 - 15 (16 bit)
Timer n Status Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OVF : counter overflow falg
bits : 0 - 0 (1 bit)
MFB : MATCH register B flag
bits : 1 - 1 (1 bit)
MFA : Match register A Flag
bits : 2 - 2 (1 bit)
Timer n Interrupt Enable Register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OVIE : Counter overflow interrupt enable
bits : 0 - 0 (1 bit)
MBIE : GRB Match interrupt enable
bits : 1 - 1 (1 bit)
MAIE : GRA Match interrupt enablee
bits : 2 - 2 (1 bit)
Timer n Control Register 2
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TEN : Timer enable bit
bits : 0 - 0 (1 bit)
TCLR : Timer register clear
bits : 1 - 1 (1 bit)
Timer n Prescaler Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRS : Prescaler value of count clock
bits : 0 - 9 (10 bit)
Timer n General Register A
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GRA : GRA
bits : 0 - 15 (16 bit)
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