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I2C

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :

Registers

CTRL1

ADDR1

DATA

STS1

STS2

STS3

INTCTRL

CLKCTRL1

CLKCTRL2

MRT

CTRL2

CLKFREQ

ADDR0


CTRL1

Control register 1
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTRL1 CTRL1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 I2CEN BCEN STRDIS

I2CEN : I2CEN
bits : 0 - 0 (1 bit)

BCEN : BCEN
bits : 6 - 6 (1 bit)

STRDIS : STRDIS
bits : 7 - 7 (1 bit)


ADDR1

Slave address register 1
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADDR1 ADDR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDR ADDRCFG ADDRMODE

ADDR : ADDR
bits : 1 - 2 (2 bit)

ADDRCFG : ADDRCFG
bits : 6 - 6 (1 bit)

ADDRMODE : ADDRMODE
bits : 7 - 7 (1 bit)


DATA

Data register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA DATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : DATA
bits : 0 - 7 (8 bit)


STS1

Status register 1
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

STS1 STS1 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SBTCF ADDRF BTCF ADDR10F SBDF RXBNEF TXBEF

SBTCF : SBTCF
bits : 0 - 0 (1 bit)

ADDRF : ADDRF
bits : 1 - 1 (1 bit)

BTCF : BTCF
bits : 2 - 2 (1 bit)

ADDR10F : ADDR10F
bits : 3 - 3 (1 bit)

SBDF : SBDF
bits : 4 - 4 (1 bit)

RXBNEF : RXBNEF
bits : 7 - 7 (1 bit)

TXBEF : TXBEF
bits : 8 - 8 (1 bit)


STS2

Status register 2
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

STS2 STS2 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BEF ALF AEF OUF WFHF

BEF : BEF
bits : 0 - 0 (1 bit)

ALF : ALF
bits : 1 - 1 (1 bit)

AEF : AEF
bits : 2 - 2 (1 bit)

OUF : OUF
bits : 3 - 3 (1 bit)

WFHF : WFHF
bits : 5 - 5 (1 bit)


STS3

Status register 3
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

STS3 STS3 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MMF BUSYF RWMF RGF

MMF : MMF
bits : 0 - 0 (1 bit)

BUSYF : BUSYF
bits : 1 - 1 (1 bit)

RWMF : RWMF
bits : 2 - 2 (1 bit)

RGF : RGF
bits : 4 - 4 (1 bit)


INTCTRL

Interrupt control register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTCTRL INTCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ERRIE EVTIE BUFIE

ERRIE : ERRIE
bits : 0 - 0 (1 bit)

EVTIE : EVTIE
bits : 1 - 1 (1 bit)

BUFIE : BUFIE
bits : 2 - 2 (1 bit)


CLKCTRL1

Clock control register 1
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CLKCTRL1 CLKCTRL1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLKCTRL

CLKCTRL : CLKCTRL
bits : 0 - 7 (8 bit)


CLKCTRL2

Clock control register 2
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CLKCTRL2 CLKCTRL2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLKCTRL FMDC FASTMODE

CLKCTRL : CLKCTRL
bits : 0 - 3 (4 bit)

FMDC : FMDC
bits : 6 - 6 (1 bit)

FASTMODE : FASTMODE
bits : 7 - 7 (1 bit)


MRT

Max Rise time register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MRT MRT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MRT

MRT : MRT
bits : 0 - 5 (6 bit)


CTRL2

Control register 2
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTRL2 CTRL2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 STA STOP ACKEN ACKPOS SWRST

STA : STA
bits : 0 - 0 (1 bit)

STOP : STOP
bits : 1 - 1 (1 bit)

ACKEN : ACKEN
bits : 2 - 2 (1 bit)

ACKPOS : ACKPOS
bits : 3 - 3 (1 bit)

SWRST : SWRST
bits : 7 - 7 (1 bit)


CLKFREQ

Frequency Control register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CLKFREQ CLKFREQ read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FREQ

FREQ : FREQ
bits : 0 - 5 (6 bit)


ADDR0

Slave address register 0
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADDR0 ADDR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDR0

ADDR0 : ADDR0
bits : 0 - 7 (8 bit)



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