\n
address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :
Control register 1
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
I2CEN : I2CEN
bits : 0 - 0 (1 bit)
BCEN : BCEN
bits : 6 - 6 (1 bit)
STRDIS : STRDIS
bits : 7 - 7 (1 bit)
Slave address register 1
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ADDR : ADDR
bits : 1 - 2 (2 bit)
ADDRCFG : ADDRCFG
bits : 6 - 6 (1 bit)
ADDRMODE : ADDRMODE
bits : 7 - 7 (1 bit)
Data register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA : DATA
bits : 0 - 7 (8 bit)
Status register 1
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SBTCF : SBTCF
bits : 0 - 0 (1 bit)
ADDRF : ADDRF
bits : 1 - 1 (1 bit)
BTCF : BTCF
bits : 2 - 2 (1 bit)
ADDR10F : ADDR10F
bits : 3 - 3 (1 bit)
SBDF : SBDF
bits : 4 - 4 (1 bit)
RXBNEF : RXBNEF
bits : 7 - 7 (1 bit)
TXBEF : TXBEF
bits : 8 - 8 (1 bit)
Status register 2
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
BEF : BEF
bits : 0 - 0 (1 bit)
ALF : ALF
bits : 1 - 1 (1 bit)
AEF : AEF
bits : 2 - 2 (1 bit)
OUF : OUF
bits : 3 - 3 (1 bit)
WFHF : WFHF
bits : 5 - 5 (1 bit)
Status register 3
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
MMF : MMF
bits : 0 - 0 (1 bit)
BUSYF : BUSYF
bits : 1 - 1 (1 bit)
RWMF : RWMF
bits : 2 - 2 (1 bit)
RGF : RGF
bits : 4 - 4 (1 bit)
Interrupt control register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ERRIE : ERRIE
bits : 0 - 0 (1 bit)
EVTIE : EVTIE
bits : 1 - 1 (1 bit)
BUFIE : BUFIE
bits : 2 - 2 (1 bit)
Clock control register 1
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLKCTRL : CLKCTRL
bits : 0 - 7 (8 bit)
Clock control register 2
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLKCTRL : CLKCTRL
bits : 0 - 3 (4 bit)
FMDC : FMDC
bits : 6 - 6 (1 bit)
FASTMODE : FASTMODE
bits : 7 - 7 (1 bit)
Max Rise time register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MRT : MRT
bits : 0 - 5 (6 bit)
Control register 2
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
STA : STA
bits : 0 - 0 (1 bit)
STOP : STOP
bits : 1 - 1 (1 bit)
ACKEN : ACKEN
bits : 2 - 2 (1 bit)
ACKPOS : ACKPOS
bits : 3 - 3 (1 bit)
SWRST : SWRST
bits : 7 - 7 (1 bit)
Frequency Control register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FREQ : FREQ
bits : 0 - 5 (6 bit)
Slave address register 0
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ADDR0 : ADDR0
bits : 0 - 7 (8 bit)
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