\n
address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :
Flash access control register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LATENCY : Latency
bits : 0 - 2 (3 bit)
access : read-write
HCAEN : Flash half cycle access enable
bits : 3 - 3 (1 bit)
access : read-write
PBEN : Prefetch buffer enable
bits : 4 - 4 (1 bit)
access : read-write
PBSF : Prefetch buffer status
bits : 5 - 5 (1 bit)
access : read-only
Control register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PG : Programming
bits : 0 - 0 (1 bit)
PAGEERA : Page Erase
bits : 1 - 1 (1 bit)
MASSERA : Mass Erase
bits : 2 - 2 (1 bit)
OBP : Option byte programming
bits : 4 - 4 (1 bit)
OBE : Option byte erase
bits : 5 - 5 (1 bit)
STA : Start
bits : 6 - 6 (1 bit)
LOCK : Lock
bits : 7 - 7 (1 bit)
OBWEN : Option bytes write enable
bits : 9 - 9 (1 bit)
ERRIE : Error interrupt enable
bits : 10 - 10 (1 bit)
OCIE : End of operation interrupt enable
bits : 12 - 12 (1 bit)
Flash address register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
ADDR : Flash Address
bits : 0 - 31 (32 bit)
Option byte register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
OBE : OBE
bits : 0 - 0 (1 bit)
READPROT : READPROT
bits : 1 - 1 (1 bit)
WWDTSW : WWDTSW
bits : 2 - 2 (1 bit)
WWDTRST : WWDTRST
bits : 3 - 3 (1 bit)
IWDTSW : IWDTSW
bits : 4 - 4 (1 bit)
LIRCEN : LIRCEN
bits : 5 - 5 (1 bit)
HIRCTRIM : HIRCTRIM
bits : 6 - 6 (1 bit)
NOTUSED : NOTUSED
bits : 7 - 9 (3 bit)
DATA0 : DATA0
bits : 10 - 17 (8 bit)
DATA1 : DATA1
bits : 18 - 25 (8 bit)
Write protection register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
WP : Write protect
bits : 0 - 31 (32 bit)
Low power mode register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HALT : Power-down in Active-Halt mode
bits : 0 - 0 (1 bit)
AHALT : Power-down in Halt mode
bits : 1 - 1 (1 bit)
tpower_on register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TPO : TPO
bits : 0 - 7 (8 bit)
Flash key register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
KEY : FPEC key
bits : 0 - 31 (32 bit)
Flash option key register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
OBEYR : Option byte key
bits : 0 - 31 (32 bit)
Status register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BUSYF : BUSYF
bits : 0 - 0 (1 bit)
access : read-only
PEF : Programming error
bits : 2 - 2 (1 bit)
access : read-write
WPEF : Write protection error
bits : 4 - 4 (1 bit)
access : read-write
OCF : End of operation
bits : 5 - 5 (1 bit)
access : read-write
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