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FMC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :

Registers

CTRL1

CTRL2

ADD

OBCS

WRTPORT

KEY

OBKEY

STS


CTRL1

Flash access control register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTRL1 CTRL1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LATENCY HCAEN PBEN PBSF

LATENCY : Latency
bits : 0 - 2 (3 bit)
access : read-write

HCAEN : Flash half cycle access enable
bits : 3 - 3 (1 bit)
access : read-write

PBEN : Prefetch buffer enable
bits : 4 - 4 (1 bit)
access : read-write

PBSF : Prefetch buffer status
bits : 5 - 5 (1 bit)
access : read-only


CTRL2

Control register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTRL2 CTRL2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PG PAGEERA MASSERA OBP OBE STA LOCK OBWEN ERRIE OCIE

PG : Programming
bits : 0 - 0 (1 bit)

PAGEERA : Page Erase
bits : 1 - 1 (1 bit)

MASSERA : Mass Erase
bits : 2 - 2 (1 bit)

OBP : Option byte programming
bits : 4 - 4 (1 bit)

OBE : Option byte erase
bits : 5 - 5 (1 bit)

STA : Start
bits : 6 - 6 (1 bit)

LOCK : Lock
bits : 7 - 7 (1 bit)

OBWEN : Option bytes write enable
bits : 9 - 9 (1 bit)

ERRIE : Error interrupt enable
bits : 10 - 10 (1 bit)

OCIE : End of operation interrupt enable
bits : 12 - 12 (1 bit)


ADD

Flash address register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

ADD ADD write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADD

ADD : Flash Address
bits : 0 - 31 (32 bit)


OBCS

Option byte register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

OBCS OBCS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OBE READPORT WDT STOPRST STDBYRST NOTUSED DATA0 Data1

OBE : Option byte error
bits : 0 - 0 (1 bit)

READPORT : Read protection
bits : 1 - 1 (1 bit)

WDT : WDG_SW
bits : 2 - 2 (1 bit)

STOPRST : nRST_STOP
bits : 3 - 3 (1 bit)

STDBYRST : nRST_STDBY
bits : 4 - 4 (1 bit)

NOTUSED :
bits : 5 - 12 (8 bit)

DATA0 : Data1
bits : 13 - 20 (8 bit)

Data1 : Data1
bits : 21 - 28 (8 bit)


WRTPORT

Write protection register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

WRTPORT WRTPORT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WRTPORT

WRTPORT : Write protect
bits : 0 - 31 (32 bit)


KEY

key register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

KEY KEY write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 KEY

KEY : FPEC key
bits : 0 - 31 (32 bit)


OBKEY

option byte key register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

OBKEY OBKEY write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 KEY

KEY : Option byte key
bits : 0 - 31 (32 bit)


STS

status register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

STS STS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BUSYF PEF WPEF OCF

BUSYF : Busy
bits : 0 - 0 (1 bit)
access : read-only

PEF : Programming error
bits : 2 - 2 (1 bit)
access : read-write

WPEF : Write protection error
bits : 4 - 4 (1 bit)
access : read-write

OCF : End of operation
bits : 5 - 5 (1 bit)
access : read-write



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