\n
address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :
Control register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SECIEN : Second interrupt Enable
bits : 0 - 0 (1 bit)
ALMIEN : Alarm interrupt Enable
bits : 1 - 1 (1 bit)
OWIEN : Overflow interrupt Enable
bits : 2 - 2 (1 bit)
RTC predivider remainder register High Bit
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DIV : RTC prescaler divider register high
bits : 0 - 3 (4 bit)
RTC predivider remainder register Low Bit
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DIV : RTC prescaler divider register Low
bits : 0 - 15 (16 bit)
RTC count register High Bit
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CNT : RTC counter register high
bits : 0 - 15 (16 bit)
RTC count register Low Bit
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CNT : RTC counter register Low
bits : 0 - 15 (16 bit)
RTC alarm clock register High Bit
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
ALM : RTC alarm register high
bits : 0 - 15 (16 bit)
RTC alarm clock register Low Bit
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
ALM : RTC alarm register low
bits : 0 - 15 (16 bit)
Control and State register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SECIF : Second Flag
bits : 0 - 0 (1 bit)
access : read-write
ALMIF : Alarm Flag
bits : 1 - 1 (1 bit)
access : read-write
OWIF : Overflow Flag
bits : 2 - 2 (1 bit)
access : read-write
SYNCF : Registers Synchronized Flag
bits : 3 - 3 (1 bit)
access : read-write
CFGEN : Configuration Flag
bits : 4 - 4 (1 bit)
access : read-write
RTOPC : RTC operation OFF
bits : 5 - 5 (1 bit)
access : read-only
RTC predivision loading register High Bit
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
DIV : RTC Prescaler Load Register High
bits : 0 - 3 (4 bit)
RTC predivision loading register Low Bit
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
DIV : RTC Prescaler Divider Register Low
bits : 0 - 15 (16 bit)
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