\n
address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :
DBGMCU_IDCODE
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DEV_ID : DEV_ID
bits : 0 - 11 (12 bit)
REV_ID : REV_ID
bits : 16 - 31 (16 bit)
DBGMCU_CR
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DBG_SLEEP : DBG_SLEEP
bits : 0 - 0 (1 bit)
DBG_STOP : DBG_STOP
bits : 1 - 1 (1 bit)
DBG_STANDBY : DBG_STANDBY
bits : 2 - 2 (1 bit)
TRACE_IOEN : TRACE_IOEN
bits : 5 - 5 (1 bit)
TRACE_MODE : TRACE_MODE
bits : 6 - 7 (2 bit)
DBG_IWDT_STOP : DBG_IWDT_STOP
bits : 8 - 8 (1 bit)
DBG_WWDT_STOP : DBG_WWDT_STOP
bits : 9 - 9 (1 bit)
DBG_TMR1_STOP : DBG_TMR1_STOP
bits : 10 - 10 (1 bit)
DBG_TMR2_STOP : DBG_TMR2_STOP
bits : 11 - 11 (1 bit)
DBG_TMR3_STOP : DBG_TMR3_STOP
bits : 12 - 12 (1 bit)
DBG_TMR4_STOP : DBG_TMR4_STOP
bits : 13 - 13 (1 bit)
DBG_CAN1_STOP : DBG_CAN1_STOP
bits : 14 - 14 (1 bit)
DBG_I2C1_SMBUS_TIMEOUT : DBG_I2C1_SMBUS_TIMEOUT
bits : 15 - 15 (1 bit)
DBG_I2C2_SMBUS_TIMEOUT : DBG_I2C2_SMBUS_TIMEOUT
bits : 16 - 16 (1 bit)
DBG_TMR8_STOP : DBG_TMR8_STOP
bits : 17 - 17 (1 bit)
DBG_TMR5_STOP : DBG_TMR5_STOP
bits : 18 - 18 (1 bit)
DBG_TMR6_STOP : DBG_TMR6_STOP
bits : 19 - 19 (1 bit)
DBG_TMR7_STOP : DBG_TMR7_STOP
bits : 20 - 20 (1 bit)
DBG_CAN2_STOP : DBG_CAN2_STOP
bits : 21 - 21 (1 bit)
Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !
This website is sponsored by Embeetle, an IDE designed from scratch for embedded software developers.