\n
address_offset : 0x0 Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : registers
protection :
Clock output select registers 0
address_offset : 0x5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CCS0 : PCLBUZ0 output clock select
bits : 0 - 2 (3 bit)
CSEL0 : PCLBUZ0 output clock select
bits : 3 - 6 (4 bit)
PCLOE0 : PCLBUZ0 pin output enable
bits : 7 - 14 (8 bit)
Clock output select registers 1
address_offset : 0x6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CCS1 : PCLBUZ1 output clock select
bits : 0 - 2 (3 bit)
CSEL1 : PCLBUZ1 output clock select
bits : 3 - 6 (4 bit)
PCLOE1 : PCLBUZ1 pin output enable
bits : 7 - 14 (8 bit)
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