\n
address_offset : 0x0 Bytes (0x0)
size : 0xD0 byte (0x0)
mem_usage : registers
protection :
Timer control register 0
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TSTART : Timer count start
bits : 0 - 0 (1 bit)
TCSTF : Timer count status flag
bits : 1 - 2 (2 bit)
TSTOP : Timer count forced stop
bits : 2 - 4 (3 bit)
TEDGF : Active edge flag
bits : 4 - 8 (5 bit)
TUNDF : Timer underflow flag
bits : 5 - 10 (6 bit)
Timer I/O control register 0
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TEDGSEL : I/O polarity switch
bits : 0 - 0 (1 bit)
TOENA : TAO output enable
bits : 2 - 4 (3 bit)
TIPF : TAIO input filter select
bits : 4 - 9 (6 bit)
TIOGT : TAIO count control
bits : 6 - 13 (8 bit)
Timer mode register 0
address_offset : 0x2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TMOD : Operation mode select
bits : 0 - 2 (3 bit)
TEDGPL : TAIO edge polarity select
bits : 3 - 6 (4 bit)
TCK : Timer count source select
bits : 4 - 10 (7 bit)
Timer event pin select register 0
address_offset : 0x3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RCCPSEL : Timer output signal select
bits : 0 - 2 (3 bit)
Timer counter register 0
address_offset : 0xC0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
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