\n
address_offset : 0x0 Bytes (0x0)
    size : 0x100 byte (0x0)
    mem_usage : registers
    protection : 
    
    Voltage detection register
    address_offset : 0x1 Bytes (0x0)
    size : 8 bit
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
LVIF : Voltage detection flag
    bits : 0 - 0 (1 bit)
    access : read-only
 Enumeration: 
 0 : GE 
    
 Supply voltage (VDD) greater or equal to detection voltage (VLVD), or when LVD is off 
 1 : LT 
    
 Supply voltage (VDD) less than detection voltage (VLVD) 
End of enumeration elements list.
LVIOMSK : Mask status flag of LVD output
    bits : 1 - 2 (2 bit)
    access : read-only
 Enumeration: 
 0 : Invalid 
    
 Mask of LVD output is invalid 
 1 : Valid 
    
 Mask of LVD output is valid 
End of enumeration elements list.
LVISEN : Enable rewritting LVIS register
    bits : 7 - 14 (8 bit)
    access : read-only
 Enumeration: 
 0 : Disable 
    
 Disabling of rewriting the LVIS register 
 1 : Enable 
    
 Enabling of rewriting the LVIS register 
End of enumeration elements list.
    Voltage detection level register
    address_offset : 0x2 Bytes (0x0)
    size : 8 bit
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
LVILV : LVD detection level
    bits : 0 - 0 (1 bit)
    access : read-write
 Enumeration: 
 0 : High 
    
 High-voltage detection level (VLVDH) 
 1 : Low 
    
 Low-voltage detection level (VLVDL or VLVD) 
End of enumeration elements list.
LVIMD : Operation mode of voltage detection
    bits : 7 - 14 (8 bit)
    access : read-write
 Enumeration: 
 0 : IRQ 
    
 interrupt mode 
 1 : Reset 
    
 reset mode 
End of enumeration elements list.
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