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PORT

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection :

Registers

PA

PMA

PMB

PMC

PMD

PMH

PB

PUA

PUB

PUC

PUD

PUH

PDA

PDB

PDC

PDD

PC

POMA

POMB

POMC

POMD

USBPMR

USBPRCR

POMH

PMCA

PMCB

PMCC

PMCD

PD

PSETA

PSETB

PSETC

PSETD

PSETH

PCLRA

PCLRB

PCLRC

PCLRD

PCLRH

PREADA

PREADB

PREADC

PREADD

PREADH

PB00CFG

PH04CFG

PH03CFG

PH02CFG

PH01CFG

PC14CFG

PC15CFG

PC08CFG

PC09CFG

PC10CFG

PC11CFG

PA00CFG

PA01CFG

PA02CFG

PA03CFG

PD07CFG

PD08CFG

PD09CFG

PD10CFG

PD11CFG

PC03CFG

PC04CFG

PC05CFG

PC06CFG

PC07CFG

PC12CFG

PC13CFG

PA04CFG

PA05CFG

PA06CFG

PA07CFG

PA08CFG

PA09CFG

PA10CFG

PD00CFG

PD01CFG

PD12CFG

PD13CFG

PD14CFG

PD15CFG

PB01CFG

PB02CFG

PB03CFG

PB04CFG

PB05CFG

PB06CFG

PB07CFG

PB08CFG

PC00CFG

PC01CFG

PC02CFG

PA11CFG

PA12CFG

PA13CFG

PA14CFG

PD02CFG

PD03CFG

PD04CFG

PD05CFG

PD06CFG

TI00PCFG

TI01PCFG

TI02PCFG

TI03PCFG

RXD0PCFG

SDI00PCFG

SCLA0PCFG

SDAA0PCFG

TI10PCFG

TI11PCFG

TI12PCFG

TI13PCFG

RXD1PCFG

IRRXDPCFG

SDI10PCFG

SPIHS0_SCKIPCFG

SPIHS0_SIPCFG

SPIHS0_MIPCFG

TI14PCFG

TI15PCFG

TI16PCFG

TI17PCFG

RXD2PCFG

SDI20PCFG

SPIHS1_NSSPCFG

SCLA1PCFG

SDAA1PCFG

INTP0PCFG

INTP1PCFG

INTP2PCFG

INTP3PCFG

INTP4PCFG

INTP5PCFG

INTP6PCFG

INTP7PCFG

PH


PA

Port register A
address_offset : 0x0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PA PA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PMA

Port mode register A
address_offset : 0x10 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PMA PMA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PMB

Port mode register B
address_offset : 0x12 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PMB PMB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PMC

Port mode register C
address_offset : 0x14 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PMC PMC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PMD

Port mode register D
address_offset : 0x16 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PMD PMD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PMH

Port mode register H
address_offset : 0x1E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PMH PMH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PB

Port register B
address_offset : 0x2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PB PB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PUA

Pull-up resistor option register A
address_offset : 0x20 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PUA PUA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PUB

Pull-up resistor option register B
address_offset : 0x22 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PUB PUB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PUC

Pull-up resistor option register C
address_offset : 0x24 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PUC PUC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PUD

Pull-up resistor option register D
address_offset : 0x26 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PUD PUD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PUH

Pull-up resistor option register H
address_offset : 0x2E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PUH PUH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PDA

Pull-down resistor option register A
address_offset : 0x30 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PDA PDA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PDB

Pull-down resistor option register B
address_offset : 0x32 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PDB PDB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PDC

Pull-down resistor option register C
address_offset : 0x34 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PDC PDC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PDD

Pull-down resistor option register D
address_offset : 0x36 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PDD PDD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PC

Port register C
address_offset : 0x4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PC PC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

POMA

Port output mode register A
address_offset : 0x40 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

POMA POMA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

POMB

Port output mode register B
address_offset : 0x42 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

POMB POMB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

POMC

Port output mode register C
address_offset : 0x44 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

POMC POMC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

POMD

Port output mode register D
address_offset : 0x46 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

POMD POMD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

USBPMR

USB port configuration register
address_offset : 0x47D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USBPMR USBPMR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DMPMR

DMPMR : USB_DP and USB_DM pin function select
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : GPIO

PA07 and PA08 did not use as USB pins

3 : USB

PA07 used as USB_DP and PA08 used as USB_DM

End of enumeration elements list.


USBPRCR

USB port configuration protect register
address_offset : 0x47E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USBPRCR USBPRCR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

POMH

Port output mode register H
address_offset : 0x4E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

POMH POMH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PMCA

Port mode control register A
address_offset : 0x50 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PMCA PMCA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PMCB

Port mode control register B
address_offset : 0x52 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PMCB PMCB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PMCC

Port mode control register C
address_offset : 0x54 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PMCC PMCC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PMCD

Port mode control register D
address_offset : 0x56 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PMCD PMCD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PD

Port register D
address_offset : 0x6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PD PD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PSETA

Port set register A
address_offset : 0x60 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PSETA PSETA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PSETB

Port set register B
address_offset : 0x62 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PSETB PSETB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PSETC

Port set register C
address_offset : 0x64 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PSETC PSETC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PSETD

Port set register D
address_offset : 0x66 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PSETD PSETD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PSETH

Port set register H
address_offset : 0x6E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PSETH PSETH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PCLRA

Port clear register A
address_offset : 0x70 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCLRA PCLRA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PCLRB

Port clear register B
address_offset : 0x72 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCLRB PCLRB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PCLRC

Port clear register C
address_offset : 0x74 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCLRC PCLRC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PCLRD

Port clear register D
address_offset : 0x76 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCLRD PCLRD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PCLRH

Port clear register H
address_offset : 0x7E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCLRH PCLRH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PREADA

Port read register A
address_offset : 0x80 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PREADA PREADA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PREADB

Port read register B
address_offset : 0x82 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PREADB PREADB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PREADC

Port read register C
address_offset : 0x84 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PREADC PREADC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PREADD

Port read register D
address_offset : 0x86 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PREADD PREADD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PREADH

Port read register H
address_offset : 0x8E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PREADH PREADH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PB00CFG

Alterate Output Function configuration register
address_offset : 0x900 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PB00CFG PB00CFG read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CFG

CFG : Alterate Output Function configuration register
bits : 0 - 3 (4 bit)

Enumeration:

0x00 : GPIO

Port used as GPIO

0x01 : TO00

Port used as TO00

0x02 : TO01

Port used as TO01

0x03 : TO02

Port used as TO02

0x04 : TO03

Port used as TO03

0x05 : SDO00/TxD0

Port used as SDO00/TxD0

End of enumeration elements list.


PH04CFG


address_offset : 0x901 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PH04CFG PH04CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PH03CFG


address_offset : 0x902 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PH03CFG PH03CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PH02CFG


address_offset : 0x903 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PH02CFG PH02CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PH01CFG


address_offset : 0x904 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PH01CFG PH01CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PC14CFG


address_offset : 0x905 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PC14CFG PC14CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PC15CFG


address_offset : 0x906 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PC15CFG PC15CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PC08CFG


address_offset : 0x907 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PC08CFG PC08CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PC09CFG


address_offset : 0x908 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PC09CFG PC09CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PC10CFG


address_offset : 0x909 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PC10CFG PC10CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PC11CFG


address_offset : 0x90A Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PC11CFG PC11CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PA00CFG


address_offset : 0x90B Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PA00CFG PA00CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PA01CFG


address_offset : 0x90C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PA01CFG PA01CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PA02CFG


address_offset : 0x90D Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PA02CFG PA02CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PA03CFG


address_offset : 0x90E Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PA03CFG PA03CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PD07CFG


address_offset : 0x90F Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PD07CFG PD07CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PD08CFG


address_offset : 0x910 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PD08CFG PD08CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PD09CFG


address_offset : 0x911 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PD09CFG PD09CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PD10CFG


address_offset : 0x912 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PD10CFG PD10CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PD11CFG


address_offset : 0x913 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PD11CFG PD11CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PC03CFG

Alterate Output Function configuration register
address_offset : 0x920 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PC03CFG PC03CFG read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CFG

CFG : Alterate Output Function configuration register
bits : 0 - 3 (4 bit)

Enumeration:

0x00 : GPIO

Port used as GPIO

0x01 : TO10

Port used as TO10

0x02 : TO11

Port used as TO11

0x03 : TO12

Port used as TO12

0x04 : TO13

Port used as TO13

0x05 : SDO10/TxD1

Port used as SDO10/TxD1

0x06 : SPIHS0_SCKO

Port used as SPIHS0_SCKO

0x07 : SPIHS0_MO

Port used as SPIHS0_MO

0x08 : SPIHS0_SO

Port used as SPIHS0_SO

End of enumeration elements list.


PC04CFG


address_offset : 0x921 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PC04CFG PC04CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PC05CFG


address_offset : 0x922 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PC05CFG PC05CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PC06CFG


address_offset : 0x923 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PC06CFG PC06CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PC07CFG


address_offset : 0x924 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PC07CFG PC07CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PC12CFG


address_offset : 0x925 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PC12CFG PC12CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PC13CFG


address_offset : 0x926 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PC13CFG PC13CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PA04CFG


address_offset : 0x927 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PA04CFG PA04CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PA05CFG


address_offset : 0x928 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PA05CFG PA05CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PA06CFG


address_offset : 0x929 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PA06CFG PA06CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PA07CFG


address_offset : 0x92A Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PA07CFG PA07CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PA08CFG


address_offset : 0x92B Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PA08CFG PA08CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PA09CFG


address_offset : 0x92C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PA09CFG PA09CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PA10CFG


address_offset : 0x92D Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PA10CFG PA10CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PD00CFG


address_offset : 0x92E Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PD00CFG PD00CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PD01CFG


address_offset : 0x92F Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PD01CFG PD01CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PD12CFG


address_offset : 0x930 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PD12CFG PD12CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PD13CFG


address_offset : 0x931 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PD13CFG PD13CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PD14CFG


address_offset : 0x932 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PD14CFG PD14CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PD15CFG


address_offset : 0x933 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PD15CFG PD15CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PB01CFG

Alterate Output Function configuration register
address_offset : 0x940 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PB01CFG PB01CFG read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CFG

CFG : Alterate Output Function configuration register
bits : 0 - 3 (4 bit)

Enumeration:

0x00 : GPIO

Port used as GPIO

0x01 : TO14

Port used as TO14

0x02 : TO15

Port used as TO15

0x03 : TO16

Port used as TO16

0x04 : TO17

Port used as TO17

0x05 : SDO10/TxD1

Port used as SDO20/TxD2

0x06 : CLKBUZ1

Port used as CLKBUZ1

End of enumeration elements list.


PB02CFG


address_offset : 0x941 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PB02CFG PB02CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PB03CFG


address_offset : 0x942 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PB03CFG PB03CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PB04CFG


address_offset : 0x943 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PB04CFG PB04CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PB05CFG


address_offset : 0x944 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PB05CFG PB05CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PB06CFG


address_offset : 0x945 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PB06CFG PB06CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PB07CFG


address_offset : 0x946 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PB07CFG PB07CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PB08CFG


address_offset : 0x947 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PB08CFG PB08CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PC00CFG


address_offset : 0x948 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PC00CFG PC00CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PC01CFG


address_offset : 0x949 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PC01CFG PC01CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PC02CFG


address_offset : 0x94A Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PC02CFG PC02CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PA11CFG


address_offset : 0x94B Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PA11CFG PA11CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PA12CFG


address_offset : 0x94C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PA12CFG PA12CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PA13CFG


address_offset : 0x94D Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PA13CFG PA13CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PA14CFG


address_offset : 0x94E Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PA14CFG PA14CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PD02CFG


address_offset : 0x94F Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PD02CFG PD02CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PD03CFG


address_offset : 0x950 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PD03CFG PD03CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PD04CFG


address_offset : 0x951 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PD04CFG PD04CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PD05CFG


address_offset : 0x952 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PD05CFG PD05CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PD06CFG


address_offset : 0x953 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PD06CFG PD06CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

TI00PCFG

Alternate function pin configuration register
address_offset : 0x980 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TI00PCFG TI00PCFG read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CFG

CFG : Alternate function pin configuration register
bits : 0 - 5 (6 bit)

Enumeration:

0x01 : PB00

PB00 used as peripheral function pin

0x02 : PH04

PH04 used as peripheral function pin

0x03 : PH03

PH03 used as peripheral function pin

0x04 : PH02

PH02 used as peripheral function pin

0x05 : PH01

PH01 used as peripheral function pin

0x06 : PC14

PC14 used as peripheral function pin

0x07 : PC15

PC15 used as peripheral function pin

0x08 : PC08

PC08 used as peripheral function pin

0x09 : PC09

PC09 used as peripheral function pin

0x0A : PC10

PC10 used as peripheral function pin

0x0B : PC11

PC11 used as peripheral function pin

0x0C : PA00

PA00 used as peripheral function pin

0x0D : PA01

PA01 used as peripheral function pin

0x0E : PA02

PA02 used as peripheral function pin

0x0F : PA03

PA03 used as peripheral function pin

0x10 : PD07

PD07 used as peripheral function pin

0x11 : PD08

PD08 used as peripheral function pin

0x12 : PD09

PD09 used as peripheral function pin

0x13 : PD10

PD10 used as peripheral function pin

0x14 : PD11

PD11 used as peripheral function pin

End of enumeration elements list.


TI01PCFG


address_offset : 0x981 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TI01PCFG TI01PCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

TI02PCFG


address_offset : 0x982 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TI02PCFG TI02PCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

TI03PCFG


address_offset : 0x983 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TI03PCFG TI03PCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

RXD0PCFG


address_offset : 0x984 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXD0PCFG RXD0PCFG read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

SDI00PCFG


address_offset : 0x984 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : RXD0PCFG
reset_Mask : 0x0

SDI00PCFG SDI00PCFG read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

SCLA0PCFG


address_offset : 0x985 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SCLA0PCFG SCLA0PCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

SDAA0PCFG


address_offset : 0x986 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SDAA0PCFG SDAA0PCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

TI10PCFG

Alternate function pin configuration register
address_offset : 0x9A0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TI10PCFG TI10PCFG read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CFG

CFG :
bits : 0 - 5 (6 bit)

Enumeration:

0x01 : PC03

PC03 used as peripheral function pin

0x02 : PC04

PC04 used as peripheral function pin

0x03 : PC05

PC05 used as peripheral function pin

0x04 : PC06

PC06 used as peripheral function pin

0x05 : PC07

PC07 used as peripheral function pin

0x06 : PC12

PC12 used as peripheral function pin

0x07 : PC13

PC13 used as peripheral function pin

0x08 : PA04

PA04 used as peripheral function pin

0x09 : PA05

PA05 used as peripheral function pin

0x0A : PA06

PA06 used as peripheral function pin

0x0B : PA07

PA07 used as peripheral function pin

0x0C : PA08

PA08 used as peripheral function pin

0x0D : PA09

PA09 used as peripheral function pin

0x0E : PA10

PA10 used as peripheral function pin

0x0F : PD00

PD00 used as peripheral function pin

0x10 : PD01

PD01 used as peripheral function pin

0x11 : PD12

PD12 used as peripheral function pin

0x12 : PD13

PD13 used as peripheral function pin

0x13 : PD14

PD14 used as peripheral function pin

0x14 : PD15

PD15 used as peripheral function pin

End of enumeration elements list.


TI11PCFG


address_offset : 0x9A1 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TI11PCFG TI11PCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

TI12PCFG


address_offset : 0x9A2 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TI12PCFG TI12PCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

TI13PCFG


address_offset : 0x9A3 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TI13PCFG TI13PCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

RXD1PCFG


address_offset : 0x9A4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXD1PCFG RXD1PCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

IRRXDPCFG


address_offset : 0x9A4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : RXD1PCFG
reset_Mask : 0x0

IRRXDPCFG IRRXDPCFG read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

SDI10PCFG


address_offset : 0x9A4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : RXD1PCFG
reset_Mask : 0x0

SDI10PCFG SDI10PCFG read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

SPIHS0_SCKIPCFG


address_offset : 0x9A5 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SPIHS0_SCKIPCFG SPIHS0_SCKIPCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

SPIHS0_SIPCFG


address_offset : 0x9A6 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SPIHS0_SIPCFG SPIHS0_SIPCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

SPIHS0_MIPCFG


address_offset : 0x9A7 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SPIHS0_MIPCFG SPIHS0_MIPCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

TI14PCFG

Alternate function pin configuration register
address_offset : 0x9C0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TI14PCFG TI14PCFG read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CFG

CFG :
bits : 0 - 5 (6 bit)

Enumeration:

0x01 : PB01

PB01 used as peripheral function pin

0x02 : PB02

PB02 used as peripheral function pin

0x03 : PB03

PB03 used as peripheral function pin

0x04 : PB04

PB04 used as peripheral function pin

0x05 : PB05

PB05 used as peripheral function pin

0x06 : PB06

PB06 used as peripheral function pin

0x07 : PB07

PB07 used as peripheral function pin

0x08 : PB08

PB08 used as peripheral function pin

0x09 : PC00

PC00 used as peripheral function pin

0x0A : PC01

PC01 used as peripheral function pin

0x0B : PC02

PC02 used as peripheral function pin

0x0C : PA11

PA11 used as peripheral function pin

0x0D : PA12

PA12 used as peripheral function pin

0x0E : PA13

PA13 used as peripheral function pin

0x0F : PA14

PA14 used as peripheral function pin

0x10 : PD02

PD02 used as peripheral function pin

0x11 : PD03

PD03 used as peripheral function pin

0x12 : PD04

PD04 used as peripheral function pin

0x13 : PD05

PD05 used as peripheral function pin

0x14 : PD06

PD06 used as peripheral function pin

End of enumeration elements list.


TI15PCFG


address_offset : 0x9C1 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TI15PCFG TI15PCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

TI16PCFG


address_offset : 0x9C2 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TI16PCFG TI16PCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

TI17PCFG


address_offset : 0x9C3 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TI17PCFG TI17PCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

RXD2PCFG


address_offset : 0x9C4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXD2PCFG RXD2PCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

SDI20PCFG


address_offset : 0x9C4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : RXD2PCFG
reset_Mask : 0x0

SDI20PCFG SDI20PCFG read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

SPIHS1_NSSPCFG


address_offset : 0x9C5 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SPIHS1_NSSPCFG SPIHS1_NSSPCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

SCLA1PCFG


address_offset : 0x9C6 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SCLA1PCFG SCLA1PCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

SDAA1PCFG


address_offset : 0x9C7 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SDAA1PCFG SDAA1PCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

INTP0PCFG

Alternate INTP pin configuration register
address_offset : 0x9E0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTP0PCFG INTP0PCFG read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CFG

CFG :
bits : 0 - 2 (3 bit)

Enumeration:

0x00 : PC00

PC00 used as INTP0 pin

0x01 : PC01

PC01 used as INTP0 pin

0x02 : PC02

PC02 used as INTP0 pin

0x03 : PC03

PC03 used as INTP0 pin

0x04 : PC04

PC04 used as INTP0 pin

0x05 : PC05

PC05 used as INTP0 pin

0x06 : PC06

PC06 used as INTP0 pin

0x07 : PC07

PC07 used as INTP0 pin

End of enumeration elements list.


INTP1PCFG

Alternate INTP pin configuration register
address_offset : 0x9E1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTP1PCFG INTP1PCFG read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CFG

CFG :
bits : 0 - 2 (3 bit)

Enumeration:

0x00 : PC12

PC12 used as INTP1 pin

0x01 : PC13

PC13 used as INTP1 pin

0x02 : PC14

PC14 used as INTP1 pin

0x03 : PC15

PC15 used as INTP1 pin

0x04 : PC08

PC08 used as INTP1 pin

0x05 : PC09

PC09 used as INTP1 pin

0x06 : PC10

PC10 used as INTP1 pin

0x07 : PC11

PC11 used as INTP1 pin

End of enumeration elements list.


INTP2PCFG

Alternate INTP pin configuration register
address_offset : 0x9E2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTP2PCFG INTP2PCFG read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CFG

CFG :
bits : 0 - 2 (3 bit)

Enumeration:

0x00 : PA00

PA00 used as INTP2 pin

0x01 : PA01

PA01 used as INTP2 pin

0x02 : PA02

PA02 used as INTP2 pin

0x03 : PA03

PA03 used as INTP2 pin

0x04 : PA11

PA11 used as INTP2 pin

0x05 : PA12

PA12 used as INTP2 pin

0x06 : PA13

PA13 used as INTP2 pin

0x07 : PA14

PA14 used as INTP2 pin

End of enumeration elements list.


INTP3PCFG

Alternate INTP pin configuration register
address_offset : 0x9E3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTP3PCFG INTP3PCFG read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CFG

CFG :
bits : 0 - 2 (3 bit)

Enumeration:

0x00 : PA04

PA04 used as INTP3 pin

0x01 : PA05

PA05 used as INTP3 pin

0x02 : PA06

PA06 used as INTP3 pin

0x03 : PA07

PA07 used as INTP3 pin

0x04 : PA08

PA08 used as INTP3 pin

0x05 : PA09

PA09 used as INTP3 pin

0x06 : PA10

PA10 used as INTP3 pin

End of enumeration elements list.


INTP4PCFG

Alternate INTP pin configuration register
address_offset : 0x9E4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTP4PCFG INTP4PCFG read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CFG

CFG :
bits : 0 - 2 (3 bit)

Enumeration:

0x00 : PD00

PD00 used as INTP4 pin

0x01 : PD01

PD01 used as INTP4 pin

0x02 : PD12

PD12 used as INTP4 pin

0x03 : PD13

PD13 used as INTP4 pin

0x04 : PD14

PD14 used as INTP4 pin

0x05 : PD15

PD15 used as INTP4 pin

0x06 : PD02

PD02 used as INTP4 pin

0x07 : PD03

PD03 used as INTP4 pin

End of enumeration elements list.


INTP5PCFG

Alternate INTP pin configuration register
address_offset : 0x9E5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTP5PCFG INTP5PCFG read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CFG

CFG :
bits : 0 - 2 (3 bit)

Enumeration:

0x00 : PD04

PD04 used as INTP5 pin

0x01 : PD05

PD05 used as INTP5 pin

0x02 : PD06

PD06 used as INTP5 pin

0x03 : PD07

PD07 used as INTP5 pin

0x04 : PD08

PD08 used as INTP5 pin

0x05 : PD09

PD09 used as INTP5 pin

0x06 : PD10

PD10 used as INTP5 pin

0x07 : PD11

PD11 used as INTP5 pin

End of enumeration elements list.


INTP6PCFG

Alternate INTP pin configuration register
address_offset : 0x9E6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTP6PCFG INTP6PCFG read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CFG

CFG :
bits : 0 - 2 (3 bit)

Enumeration:

0x00 : PB00

PB00 used as INTP6 pin

0x01 : PH04

PH04 used as INTP6 pin

0x02 : PH03

PH03 used as INTP6 pin

0x03 : PH02

PH02 used as INTP6 pin

0x04 : PH01

PH01 used as INTP6 pin

0x05 : PB01

PB01 used as INTP6 pin

0x06 : PB02

PB02 used as INTP6 pin

End of enumeration elements list.


INTP7PCFG

Alternate INTP pin configuration register
address_offset : 0x9E7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTP7PCFG INTP7PCFG read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CFG

CFG :
bits : 0 - 2 (3 bit)

Enumeration:

0x00 : PB03

PB03 used as INTP7 pin

0x01 : PB04

PB04 used as INTP7 pin

0x02 : PB05

PB05 used as INTP7 pin

0x03 : PB06

PB06 used as INTP7 pin

0x04 : PB07

PB07 used as INTP7 pin

0x05 : PB08

PB08 used as INTP7 pin

End of enumeration elements list.


PH

Port register H
address_offset : 0xE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PH PH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0


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