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INTM

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x100 byte (0x0)
mem_usage : registers
protection :

Registers

EGP0

EGN0


EGP0

External interrupt rising edge enable register
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EGP0 EGP0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EGP0 EGP1 EGP2 EGP3 EGP4 EGP5 EGP6 EGP7

EGP0 :
bits : 0 - 0 (1 bit)

EGP1 :
bits : 1 - 2 (2 bit)

EGP2 :
bits : 2 - 4 (3 bit)

EGP3 :
bits : 3 - 6 (4 bit)

EGP4 :
bits : 4 - 8 (5 bit)

EGP5 :
bits : 5 - 10 (6 bit)

EGP6 :
bits : 6 - 12 (7 bit)

EGP7 :
bits : 7 - 14 (8 bit)


EGN0

External interrupt falling edge enable register
address_offset : 0x1 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EGN0 EGN0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EGN0 EGN1 EGN2 EGN3 EGN4 EGN5 EGN6 EGN7

EGN0 :
bits : 0 - 0 (1 bit)

EGN1 :
bits : 1 - 2 (2 bit)

EGN2 :
bits : 2 - 4 (3 bit)

EGN3 :
bits : 3 - 6 (4 bit)

EGN4 :
bits : 4 - 8 (5 bit)

EGN5 :
bits : 5 - 10 (6 bit)

EGN6 :
bits : 6 - 12 (7 bit)

EGN7 :
bits : 7 - 14 (8 bit)



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