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PWM

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0xFFF byte (0x0)
mem_usage : registers
protection :

Registers

PWMCON0

PWMCON1

PWML1AD0

PWMD1A

PWMD1B

PWMCON2

PWML2AD0

PWMD2A

PWMD2B

PWMCON3

PWML3AD0

PWMD3A

PWMD3B

PWML0AD0

PWMIMSC

PWMRIS

PWMMIS

PWMICLR

PWMRUN

PWMD0A

PWMD0B


PWMCON0

PWM group 0 contol register
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWMCON0 PWMCON0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMS CHS PWMS PWMPS PWMEN

CMS : Capture mode select
bits : 0 - 1 (2 bit)

Enumeration: ENUM

0 : rising edge

capture on rising edge

1 : falling edge

capture on falling edge

2 : form rising to falling edge

count from rising edge to falling edge

3 : form falling to rising

count from falling edge to rising edge

End of enumeration elements list.

CHS : Capture channel select
bits : 2 - 4 (3 bit)

Enumeration: ENUM

0 : CH A

channel A

1 : CH B

channel B

End of enumeration elements list.

PWMS : PWM Select
bits : 3 - 6 (4 bit)

Enumeration: ENUM

0 : capture

0: Capture Mode

1 : pwm

1: PWM mode

End of enumeration elements list.

PWMPS : PWM prescale select
bits : 4 - 9 (6 bit)

Enumeration: ENUM

0x0 : PCLK

0x0: PCLk

0x1 : PCLK/4

0x1: PCLk/4

0x2 : PCLK/16

0x1: PCLk/4

0x3 : PCLK/64

0x1: PCLk/4

End of enumeration elements list.

PWMEN : PWM enable
bits : 6 - 12 (7 bit)

Enumeration: ENUM

0 : Disable

Disable PWM0

1 : Enable

Enable PWM0

End of enumeration elements list.


PWMCON1

PWM group 0 contol register
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWMCON1 PWMCON1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMS CHS PWMS PWMPS PWMEN

CMS : Capture mode select
bits : 0 - 1 (2 bit)

Enumeration: ENUM

0 : rising edge

capture on rising edge

1 : falling edge

capture on falling edge

2 : form rising to falling edge

count from rising edge to falling edge

3 : form falling to rising

count from falling edge to rising edge

End of enumeration elements list.

CHS : Capture channel select
bits : 2 - 4 (3 bit)

Enumeration: ENUM

0 : CH A

channel A

1 : CH B

channel B

End of enumeration elements list.

PWMS : PWM Select
bits : 3 - 6 (4 bit)

Enumeration: ENUM

0 : capture

0: Capture Mode

1 : pwm

1: PWM mode

End of enumeration elements list.

PWMPS : PWM prescale select
bits : 4 - 9 (6 bit)

Enumeration: ENUM

0x0 : PCLK

0x0: PCLk

0x1 : PCLK/4

0x1: PCLk/4

0x2 : PCLK/16

0x1: PCLk/4

0x3 : PCLK/64

0x1: PCLk/4

End of enumeration elements list.

PWMEN : PWM enable
bits : 6 - 12 (7 bit)

Enumeration: ENUM

0 : Disable

Disable PWM0

1 : Enable

Enable PWM0

End of enumeration elements list.


PWML1AD0

PWM group 0 load register
address_offset : 0x14 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWML1AD0 PWML1AD0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PWMLOAD RELOAD

PWMLOAD : PWM load value
bits : 0 - 15 (16 bit)

RELOAD : PWM reload enable field
bits : 16 - 32 (17 bit)

Enumeration: ENUM

0 : don't reload

When RELOAD ='0', Reload Value=0xFFFF

1 : reload

When RELOAD='1', Reload Value=PMLOAD

End of enumeration elements list.


PWMD1A

PWM group 0 channel A data register
address_offset : 0x18 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWMD1A PWMD1A read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PWMDATA PWMOP

PWMDATA : PWM Output Polarity Select.
bits : 0 - 15 (16 bit)

PWMOP : PWM Data
bits : 16 - 32 (17 bit)

Enumeration: ENUM

0 : low output

When PWMOP ='0', PWM leading low output.

1 : high output

When PWMOP ='1', PWM leading high output

End of enumeration elements list.


PWMD1B

PWM group 0 channel B data register
address_offset : 0x1C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWMD1B PWMD1B read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PWMDATB PWMOP

PWMDATB : PWM Output Polarity Select.
bits : 0 - 15 (16 bit)

PWMOP : PWM Data
bits : 16 - 32 (17 bit)

Enumeration: ENUM

0 : low output

When PWMOP ='0', PWM leading low output.

1 : high output

When PWMOP ='1', PWM leading high output

End of enumeration elements list.


PWMCON2

PWM group 0 contol register
address_offset : 0x20 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWMCON2 PWMCON2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMS CHS PWMS PWMPS PWMEN

CMS : Capture mode select
bits : 0 - 1 (2 bit)

Enumeration: ENUM

0 : rising edge

capture on rising edge

1 : falling edge

capture on falling edge

2 : form rising to falling edge

count from rising edge to falling edge

3 : form falling to rising

count from falling edge to rising edge

End of enumeration elements list.

CHS : Capture channel select
bits : 2 - 4 (3 bit)

Enumeration: ENUM

0 : CH A

channel A

1 : CH B

channel B

End of enumeration elements list.

PWMS : PWM Select
bits : 3 - 6 (4 bit)

Enumeration: ENUM

0 : capture

0: Capture Mode

1 : pwm

1: PWM mode

End of enumeration elements list.

PWMPS : PWM prescale select
bits : 4 - 9 (6 bit)

Enumeration: ENUM

0x0 : PCLK

0x0: PCLk

0x1 : PCLK/4

0x1: PCLk/4

0x2 : PCLK/16

0x1: PCLk/4

0x3 : PCLK/64

0x1: PCLk/4

End of enumeration elements list.

PWMEN : PWM enable
bits : 6 - 12 (7 bit)

Enumeration: ENUM

0 : Disable

Disable PWM0

1 : Enable

Enable PWM0

End of enumeration elements list.


PWML2AD0

PWM group 0 load register
address_offset : 0x24 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWML2AD0 PWML2AD0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PWMLOAD RELOAD

PWMLOAD : PWM load value
bits : 0 - 15 (16 bit)

RELOAD : PWM reload enable field
bits : 16 - 32 (17 bit)

Enumeration: ENUM

0 : don't reload

When RELOAD ='0', Reload Value=0xFFFF

1 : reload

When RELOAD='1', Reload Value=PMLOAD

End of enumeration elements list.


PWMD2A

PWM group 0 channel A data register
address_offset : 0x28 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWMD2A PWMD2A read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PWMDATA PWMOP

PWMDATA : PWM Output Polarity Select.
bits : 0 - 15 (16 bit)

PWMOP : PWM Data
bits : 16 - 32 (17 bit)

Enumeration: ENUM

0 : low output

When PWMOP ='0', PWM leading low output.

1 : high output

When PWMOP ='1', PWM leading high output

End of enumeration elements list.


PWMD2B

PWM group 0 channel B data register
address_offset : 0x2C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWMD2B PWMD2B read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PWMDATB PWMOP

PWMDATB : PWM Output Polarity Select.
bits : 0 - 15 (16 bit)

PWMOP : PWM Data
bits : 16 - 32 (17 bit)

Enumeration: ENUM

0 : low output

When PWMOP ='0', PWM leading low output.

1 : high output

When PWMOP ='1', PWM leading high output

End of enumeration elements list.


PWMCON3

PWM group 0 contol register
address_offset : 0x30 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWMCON3 PWMCON3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMS CHS PWMS PWMPS PWMEN

CMS : Capture mode select
bits : 0 - 1 (2 bit)

Enumeration: ENUM

0 : rising edge

capture on rising edge

1 : falling edge

capture on falling edge

2 : form rising to falling edge

count from rising edge to falling edge

3 : form falling to rising

count from falling edge to rising edge

End of enumeration elements list.

CHS : Capture channel select
bits : 2 - 4 (3 bit)

Enumeration: ENUM

0 : CH A

channel A

1 : CH B

channel B

End of enumeration elements list.

PWMS : PWM Select
bits : 3 - 6 (4 bit)

Enumeration: ENUM

0 : capture

0: Capture Mode

1 : pwm

1: PWM mode

End of enumeration elements list.

PWMPS : PWM prescale select
bits : 4 - 9 (6 bit)

Enumeration: ENUM

0x0 : PCLK

0x0: PCLk

0x1 : PCLK/4

0x1: PCLk/4

0x2 : PCLK/16

0x1: PCLk/4

0x3 : PCLK/64

0x1: PCLk/4

End of enumeration elements list.

PWMEN : PWM enable
bits : 6 - 12 (7 bit)

Enumeration: ENUM

0 : Disable

Disable PWM0

1 : Enable

Enable PWM0

End of enumeration elements list.


PWML3AD0

PWM group 0 load register
address_offset : 0x34 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWML3AD0 PWML3AD0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PWMLOAD RELOAD

PWMLOAD : PWM load value
bits : 0 - 15 (16 bit)

RELOAD : PWM reload enable field
bits : 16 - 32 (17 bit)

Enumeration: ENUM

0 : don't reload

When RELOAD ='0', Reload Value=0xFFFF

1 : reload

When RELOAD='1', Reload Value=PMLOAD

End of enumeration elements list.


PWMD3A

PWM group 0 channel A data register
address_offset : 0x38 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWMD3A PWMD3A read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PWMDATA PWMOP

PWMDATA : PWM Output Polarity Select.
bits : 0 - 15 (16 bit)

PWMOP : PWM Data
bits : 16 - 32 (17 bit)

Enumeration: ENUM

0 : low output

When PWMOP ='0', PWM leading low output.

1 : high output

When PWMOP ='1', PWM leading high output

End of enumeration elements list.


PWMD3B

PWM group 0 channel B data register
address_offset : 0x3C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWMD3B PWMD3B read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PWMDATB PWMOP

PWMDATB : PWM Output Polarity Select.
bits : 0 - 15 (16 bit)

PWMOP : PWM Data
bits : 16 - 32 (17 bit)

Enumeration: ENUM

0 : low output

When PWMOP ='0', PWM leading low output.

1 : high output

When PWMOP ='1', PWM leading high output

End of enumeration elements list.


PWML0AD0

PWM group 0 load register
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWML0AD0 PWML0AD0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PWMLOAD RELOAD

PWMLOAD : PWM load value
bits : 0 - 15 (16 bit)

RELOAD : PWM reload enable field
bits : 16 - 32 (17 bit)

Enumeration: ENUM

0 : don't reload

When RELOAD ='0',Reload Value=0xFFFF

1 : reload

When RELOAD='1',Reload Value=PMLOAD

End of enumeration elements list.


PWMIMSC

PWM Interrupt Mask Set and Clear Register
address_offset : 0x40 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWMIMSC PWMIMSC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PWMIMSC0 PWMIMSC1 PWMIMSC2 PWMIMSC3 PWMIMSC4 PWMIMSC5 PWMIMSC6 PWMIMSC7

PWMIMSC0 : PWM Group 0 Overflow interrupt Mask Set and Clear
bits : 0 - 0 (1 bit)

Enumeration: ENUM

0 : Disable

PWM Group 0 Overflow interrupt Mask disable

1 : Enable

PWM Group 0 Overflow interrupt Mask enable

End of enumeration elements list.

PWMIMSC1 : PWM Group 1 Overflow interrupt Mask Set and Clear
bits : 1 - 2 (2 bit)

Enumeration: ENUM

0 : Disable

PWM Group 1 Overflow interrupt Mask disable

1 : high output

PWM Group 1 Overflow interrupt Mask enable

End of enumeration elements list.

PWMIMSC2 : PWM Group 2 Overflow interrupt Mask Set and Clear
bits : 2 - 4 (3 bit)

Enumeration: ENUM

0 : Disable

PWM Group 2 Overflow interrupt Mask disable

1 : high output

PWM Group 2 Overflow interrupt Mask enable

End of enumeration elements list.

PWMIMSC3 : PWM Group 3 Overflow interrupt Mask Set and Clear
bits : 3 - 6 (4 bit)

Enumeration: ENUM

0 : Disable

PWM Group 3 Overflow interrupt Mask disable

1 : high output

PWM Group 3 Overflow interrupt Mask enable

End of enumeration elements list.

PWMIMSC4 : PWM Group 4 Overflow interrupt Mask Set and Clear
bits : 4 - 8 (5 bit)

Enumeration: ENUM

0 : Disable

PWM Group 4 Overflow interrupt Mask disable

1 : high output

PWM Group 4 Overflow interrupt Mask enable

End of enumeration elements list.

PWMIMSC5 : PWM Group 5 Overflow interrupt Mask Set and Clear
bits : 5 - 10 (6 bit)

Enumeration: ENUM

0 : Disable

PWM Group 5 Overflow interrupt Mask disable

1 : high output

PWM Group 5 Overflow interrupt Mask enable

End of enumeration elements list.

PWMIMSC6 : PWM Group 6 Overflow interrupt Mask Set and Clear
bits : 6 - 12 (7 bit)

Enumeration: ENUM

0 : Disable

PWM Group 6 Overflow interrupt Mask disable

1 : high output

PWM Group 6 Overflow interrupt Mask enable

End of enumeration elements list.

PWMIMSC7 : PWM Group 7 Overflow interrupt Mask Set and Clear
bits : 7 - 14 (8 bit)

Enumeration: ENUM

0 : Disable

PWM Group 7 Overflow interrupt Mask disable

1 : high output

PWM Group 7 Overflow interrupt Mask enable

End of enumeration elements list.


PWMRIS

PWM Raw interrupt Status Register
address_offset : 0x44 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PWMRIS PWMRIS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PWMRIS0 PWMRIS1 PWMRIS2 PWMRIS3 PWMRIS4 PWMRIS5 PWMRIS6 PWMRIS7

PWMRIS0 : PWM Group 0 Raw Compare/Capture interrupt Status
bits : 0 - 0 (1 bit)

PWMRIS1 : PWM Group 1 Raw Compare/Capture interrupt Status
bits : 1 - 2 (2 bit)

PWMRIS2 : PWM Group 2 Raw Compare/Capture interrupt Status
bits : 2 - 4 (3 bit)

PWMRIS3 : PWM Group 3 Raw Compare/Capture interrupt Status
bits : 3 - 6 (4 bit)

PWMRIS4 : PWM Group 4 Raw Compare/Capture interrupt Status
bits : 4 - 8 (5 bit)

PWMRIS5 : PWM Group 5 Raw Compare/Capture interrupt Status
bits : 5 - 10 (6 bit)

PWMRIS6 : PWM Group 6 Raw Compare/Capture interrupt Status
bits : 6 - 12 (7 bit)

PWMRIS7 : PWM Group 7 Raw Compare/Capture interrupt Status
bits : 7 - 14 (8 bit)


PWMMIS

PWM Masked interrupt Status
address_offset : 0x48 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PWMMIS PWMMIS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PWMMIS0 PWMMIS1 PWMMIS2 PWMMIS3 PWMMIS4 PWMMIS5 PWMMIS6 PWMMIS7

PWMMIS0 : PWM Group 0 MaskedCompare/Capture interrupt Status
bits : 0 - 0 (1 bit)

PWMMIS1 : PWM Group 1 MaskedCompare/Capture interrupt Status
bits : 1 - 2 (2 bit)

PWMMIS2 : PWM Group 2 MaskedCompare/Capture interrupt Status
bits : 2 - 4 (3 bit)

PWMMIS3 : PWM Group 3 MaskedCompare/Capture interrupt Status
bits : 3 - 6 (4 bit)

PWMMIS4 : PWM Group 4 MaskedCompare/Capture interrupt Status
bits : 4 - 8 (5 bit)

PWMMIS5 : PWM Group 5 MaskedCompare/Capture interrupt Status
bits : 5 - 10 (6 bit)

PWMMIS6 : PWM Group 6 MaskedCompare/Capture interrupt Status
bits : 6 - 12 (7 bit)

PWMMIS7 : PWM Group 7 MaskedCompare/Capture interrupt Status
bits : 7 - 14 (8 bit)


PWMICLR

PWM interrupt clear Register
address_offset : 0x4C Bytes (0x0)
size : -1 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PWMICLR PWMICLR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PWMICLR0 PWMICLR1 PWMICLR2 PWMICLR3 PWMICLR4 PWMICLR5 PWMICLR6 PWMICLR7

PWMICLR0 : Writing '1' to this bits clears PWM Group 0 Compare/Capture interrupt Status
bits : 0 - 0 (1 bit)

Enumeration: ENUM

0 : Disable

PWM Group 0 Overflow interrupt Mask disable

1 : Enable

PWM Group 0 Overflow interrupt Mask enable

End of enumeration elements list.

PWMICLR1 : Writing '1' to this bits clears PWM Group 1 Compare/Capture interrupt Status
bits : 1 - 2 (2 bit)

Enumeration: ENUM

0 : Disable

PWM Group 1 Overflow interrupt Mask disable

1 : high output

PWM Group 1 Overflow interrupt Mask enable

End of enumeration elements list.

PWMICLR2 : Writing '1' to this bits clears PWM Group 2 Compare/Capture interrupt Status
bits : 2 - 4 (3 bit)

Enumeration: ENUM

0 : Disable

PWM Group 2 Overflow interrupt Mask disable

1 : high output

PWM Group 2 Overflow interrupt Mask enable

End of enumeration elements list.

PWMICLR3 : Writing '1' to this bits clears PWM Group 3 Compare/Capture interrupt Status
bits : 3 - 6 (4 bit)

Enumeration: ENUM

0 : Disable

PWM Group 3 Overflow interrupt Mask disable

1 : high output

PWM Group 3 Overflow interrupt Mask enable

End of enumeration elements list.

PWMICLR4 : Writing '1' to this bits clears PWM Group 4 Compare/Capture interrupt Status
bits : 4 - 8 (5 bit)

Enumeration: ENUM

0 : Disable

PWM Group 4 Overflow interrupt Mask disable

1 : high output

PWM Group 4 Overflow interrupt Mask enable

End of enumeration elements list.

PWMICLR5 : Writing '1' to this bits clears PWM Group 5 Compare/Capture interrupt Status
bits : 5 - 10 (6 bit)

Enumeration: ENUM

0 : Disable

PWM Group 5 Overflow interrupt Mask disable

1 : high output

PWM Group 5 Overflow interrupt Mask enable

End of enumeration elements list.

PWMICLR6 : Writing '1' to this bits clears PWM Group 6 Compare/Capture interrupt Status
bits : 6 - 12 (7 bit)

Enumeration: ENUM

0 : Disable

PWM Group 6 Overflow interrupt Mask disable

1 : high output

PWM Group 6 Overflow interrupt Mask enable

End of enumeration elements list.

PWMICLR7 : Writing '1' to this bits clears PWM Group 7 Compare/Capture interrupt Status
bits : 7 - 14 (8 bit)

Enumeration: ENUM

0 : Disable

PWM Group 7 Overflow interrupt Mask disable

1 : high output

PWM Group 7 Overflow interrupt Mask enable

End of enumeration elements list.


PWMRUN

PWM run Register
address_offset : 0x50 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWMRUN PWMRUN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RUN0 RUN1 RUN2 RUN3

RUN0 : PWMRUN0
bits : 0 - 0 (1 bit)

Enumeration: ENUM

0 : 0

Stop

1 : 1

Run

End of enumeration elements list.

RUN1 : PWMRUN1
bits : 1 - 2 (2 bit)

Enumeration: ENUM

0 : 0

Stop

1 : 1

Run

End of enumeration elements list.

RUN2 : PWMRUN2
bits : 2 - 4 (3 bit)

Enumeration: ENUM

0 : 0

Stop

1 : 1

Run

End of enumeration elements list.

RUN3 : PWMRUN3
bits : 3 - 6 (4 bit)

Enumeration: ENUM

0 : 0

Stop

1 : 1

Run

End of enumeration elements list.


PWMD0A

PWM group 0 channel A data register
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWMD0A PWMD0A read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PWMDATA PWMOP

PWMDATA : PWM Output Polarity Select.
bits : 0 - 15 (16 bit)

PWMOP : PWM Data
bits : 16 - 32 (17 bit)

Enumeration: ENUM

0 : low output

When PWMOP ='0', PWM leading low output.

1 : high output

When PWMOP ='1',PWM leading high output

End of enumeration elements list.


PWMD0B

PWM group 0 channel B data register
address_offset : 0xC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWMD0B PWMD0B read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PWMDATB PWMOP

PWMDATB : PWM Output Polarity Select.
bits : 0 - 15 (16 bit)

PWMOP : PWM Data
bits : 16 - 32 (17 bit)

Enumeration: ENUM

0 : low output

When PWMOP ='0',PWM leading low output.

1 : high output

When PWMOP ='1', PWM leading high output

End of enumeration elements list.



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