\n
address_offset : 0x0 Bytes (0x0)
size : 0xFFF byte (0x0)
mem_usage : registers
protection :
ADC Config register
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ADCDIV : ADC Clock Div
bits : 0 - 2 (3 bit)
ADCMS : ADC mode select
bits : 3 - 6 (4 bit)
Enumeration: ENUM
0 : One
one conversion
1 : Continuous
continuous conversion
End of enumeration elements list.
ADCEN : ADC enable control
bits : 4 - 8 (5 bit)
Enumeration: ENUM
0 : disable
disable config
1 : enable
enable config
End of enumeration elements list.
ADC channle2 conversion value
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ADC channle3 conversion value
address_offset : 0x14 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ADC channle4 conversion value
address_offset : 0x18 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ADC channle5 conversion value
address_offset : 0x1C Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ADC channle6 conversion value
address_offset : 0x20 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ADC channle7 conversion value
address_offset : 0x24 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ADC channle8 conversion value
address_offset : 0x28 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ADC channle9 conversion value
address_offset : 0x2C Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ADC channle10 conversion value
address_offset : 0x30 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ADC channle11 conversion value
address_offset : 0x34 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ADC channle12 conversion value
address_offset : 0x38 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ADC channle13 conversion value
address_offset : 0x3C Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ADC Scan register
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ADCE0 : ADC channle 0 enable bit
bits : 0 - 0 (1 bit)
Enumeration: ENUM
0 : disable
disable channle 0
1 : enable
enable channle 0
End of enumeration elements list.
ADCE1 : ADC channle 1 enable bit
bits : 1 - 2 (2 bit)
Enumeration: ENUM
0 : disable
disable channle 1
1 : enable
enable channle 1
End of enumeration elements list.
ADCE2 : ADC channle 2 enable bit
bits : 2 - 4 (3 bit)
Enumeration: ENUM
0 : disable
disable channle 2
1 : enable
enable channle 2
End of enumeration elements list.
ADCE3 : ADC channle 3 enable bit
bits : 3 - 6 (4 bit)
Enumeration: ENUM
0 : disable
disable channle 3
1 : enable
enable channle 3
End of enumeration elements list.
ADCE4 : ADC channle 4 enable bit
bits : 4 - 8 (5 bit)
Enumeration: ENUM
0 : disable
disable channle 4
1 : enable
enable channle 4
End of enumeration elements list.
ADCE5 : ADC channle 5 enable bit
bits : 5 - 10 (6 bit)
Enumeration: ENUM
0 : disable
disable channle 5
1 : enable
enable channle 5
End of enumeration elements list.
ADCE6 : ADC channle 6 enable bit
bits : 6 - 12 (7 bit)
Enumeration: ENUM
0 : disable
disable channle 6
1 : enable
enable channle 6
End of enumeration elements list.
ADCE7 : ADC channle 7 enable bit
bits : 7 - 14 (8 bit)
Enumeration: ENUM
0 : disable
disable channle 7
1 : enable
enable channle 7
End of enumeration elements list.
ADCE8 : ADC channle 8 enable bit
bits : 8 - 16 (9 bit)
Enumeration: ENUM
0 : disable
disable channle 8
1 : enable
enable channle 8
End of enumeration elements list.
ADCE9 : ADC channle 9 enable bit
bits : 9 - 18 (10 bit)
Enumeration: ENUM
0 : disable
disable channle 9
1 : enable
enable channle 9
End of enumeration elements list.
ADCE10 : ADC channle 10 enable bit
bits : 10 - 20 (11 bit)
Enumeration: ENUM
0 : disable
disable channle 10
1 : enable
enable channle 10
End of enumeration elements list.
ADCE11 : ADC channle 11 enable bit
bits : 11 - 22 (12 bit)
Enumeration: ENUM
0 : disable
disable channle 11
1 : enable
enable channle 11
End of enumeration elements list.
ADCE12 : ADC channle 12 enable bit
bits : 12 - 24 (13 bit)
Enumeration: ENUM
0 : disable
disable channle 12
1 : enable
enable channle 12
End of enumeration elements list.
ADCE13 : ADC channle 0 enable bit
bits : 13 - 26 (14 bit)
Enumeration: ENUM
0 : disable
disable channle 13
1 : enable
enable channle 13
End of enumeration elements list.
ADCE14 : ADC channle 14 enable bit
bits : 14 - 28 (15 bit)
Enumeration: ENUM
0 : disable
disable channle 14
1 : enable
enable channle 14
End of enumeration elements list.
ADCE15 : ADC channle 15 enable bit
bits : 15 - 30 (16 bit)
Enumeration: ENUM
0 : disable
disable channle 15
1 : enable
enable channle 15
End of enumeration elements list.
ADCST : ADC start convesion.
bits : 16 - 32 (17 bit)
Enumeration: ENUM
0 : 0
end conversion
1 : 1
start conversion
End of enumeration elements list.
ADC channle14 conversion value
address_offset : 0x40 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ADC channle15 conversion value
address_offset : 0x44 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ADC Interrupt Mask Set and Clear Register.
address_offset : 0x48 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ADCIMSC0 : ADC channle 0 interrupt enable config bit
bits : 0 - 0 (1 bit)
Enumeration: ENUM
0 : 0
disable channle 0
1 : 1
enable channle 0
End of enumeration elements list.
ADCIMSC1 : ADC channle 1 interrupt enable config bit
bits : 1 - 2 (2 bit)
Enumeration: ENUM
0 : 0
disable channle 1
1 : 1
enable channle 1
End of enumeration elements list.
ADCIMSC2 : ADC channle 2 interrupt enable config bit
bits : 2 - 4 (3 bit)
Enumeration: ENUM
0 : 0
disable channle 2
1 : 1
enable channle 2
End of enumeration elements list.
ADCIMSC3 : ADC channle 3 interrupt enable config bit
bits : 3 - 6 (4 bit)
Enumeration: ENUM
0 : 0
disable channle 3
1 : 1
enable channle 3
End of enumeration elements list.
ADCIMSC4 : ADC channle 4 interrupt enable config bit
bits : 4 - 8 (5 bit)
Enumeration: ENUM
0 : 0
disable channle 4
1 : 1
enable channle 4
End of enumeration elements list.
ADCIMSC5 : ADC channle 5 interrupt enable config bit
bits : 5 - 10 (6 bit)
Enumeration: ENUM
0 : 0
disable channle 5
1 : 1
enable channle 5
End of enumeration elements list.
ADCIMSC6 : ADC channle 6 interrupt enable config bit
bits : 6 - 12 (7 bit)
Enumeration: ENUM
0 : 0
disable channle 6
1 : 1
enable channle 6
End of enumeration elements list.
ADCIMSC7 : ADC channle 7 interrupt enable config bit
bits : 7 - 14 (8 bit)
Enumeration: ENUM
0 : 0
disable channle 7
1 : 1
enable channle 7
End of enumeration elements list.
ADCIMSC8 : ADC channle 8 interrupt enable config bit
bits : 8 - 16 (9 bit)
Enumeration: ENUM
0 : 0
disable channle 8
1 : 1
enable channle 8
End of enumeration elements list.
ADCIMSC9 : ADC channle 9 interrupt enable config bit
bits : 9 - 18 (10 bit)
Enumeration: ENUM
0 : 0
disable channle 9
1 : 1
enable channle 9
End of enumeration elements list.
ADCIMSC10 : ADC channle 10 interrupt enable config bit
bits : 10 - 20 (11 bit)
Enumeration: ENUM
0 : 0
disable channle 10
1 : 1
enable channle 10
End of enumeration elements list.
ADCIMSC11 : ADC channle 11 interrupt enable config bit
bits : 11 - 22 (12 bit)
Enumeration: ENUM
0 : 0
disable channle 11
1 : 1
enable channle 11
End of enumeration elements list.
ADCIMSC12 : ADC channle 12 interrupt enable config bit
bits : 12 - 24 (13 bit)
Enumeration: ENUM
0 : 0
disable channle 12
1 : 1
enable channle 12
End of enumeration elements list.
ADCIMSC13 : ADC channle 13 interrupt enable config bit
bits : 13 - 26 (14 bit)
Enumeration: ENUM
0 : 0
disable channle 13
1 : 1
enable channle 13
End of enumeration elements list.
ADCIMSC14 : ADC channle 14 interrupt enable config bit
bits : 14 - 28 (15 bit)
Enumeration: ENUM
0 : 0
disable channle 14
1 : 1
enable channle 14
End of enumeration elements list.
ADCIMSC15 : ADC channle 15 interrupt enable config bit
bits : 15 - 30 (16 bit)
Enumeration: ENUM
0 : 0
disable channle 15
1 : 1
enable channle 15
End of enumeration elements list.
ADC Raw Interrupt Status Register.
address_offset : 0x4C Bytes (0x0)
size : -1 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
ADCRIS0 : ADC channle 0 interrupt source status
bits : 0 - 0 (1 bit)
ADCRIS1 : ADC channle 1 interrupt source status
bits : 1 - 2 (2 bit)
ADCRIS2 : ADC channle 2 interrupt source status
bits : 2 - 4 (3 bit)
ADCRIS3 : ADC channle 3 interrupt source status
bits : 3 - 6 (4 bit)
ADCRIS4 : ADC channle 4 interrupt source status
bits : 4 - 8 (5 bit)
ADCRIS5 : ADC channle 5 interrupt source status
bits : 5 - 10 (6 bit)
ADCRIS6 : ADC channle 6 interrupt source status
bits : 6 - 12 (7 bit)
ADCRIS7 : ADC channle 7 interrupt source status
bits : 7 - 14 (8 bit)
ADCRIS8 : ADC channle 8 interrupt source status
bits : 8 - 16 (9 bit)
ADCRIS9 : ADC channle 9 interrupt source status
bits : 9 - 18 (10 bit)
ADCRIS10 : ADC channle 10 interrupt source status
bits : 10 - 20 (11 bit)
ADCRIS11 : ADC channle 11 interrupt source status
bits : 11 - 22 (12 bit)
ADCRIS12 : ADC channle 12 interrupt source status
bits : 12 - 24 (13 bit)
ADCRIS13 : ADC channle 13 interrupt source status
bits : 13 - 26 (14 bit)
ADCRIS14 : ADC channle 14 interrupt source status
bits : 14 - 28 (15 bit)
ADCRIS15 : ADC channle 15 interrupt source status
bits : 15 - 30 (16 bit)
ADC Masked Interrupt Status Register.
address_offset : 0x50 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ADCMIS0 : ADC channle 0 interrupt status
bits : 0 - 0 (1 bit)
ADCMIS1 : ADC channle 1 interrupt status
bits : 1 - 2 (2 bit)
ADCMIS2 : ADC channle 2 interrupt status
bits : 2 - 4 (3 bit)
ADCMIS3 : ADC channle 3 interrupt status
bits : 3 - 6 (4 bit)
ADCMIS4 : ADC channle 4 interrupt status
bits : 4 - 8 (5 bit)
ADCMIS5 : ADC channle 5 interrupt status
bits : 5 - 10 (6 bit)
ADCMIS6 : ADC channle 6 interrupt status
bits : 6 - 12 (7 bit)
ADCMIS7 : ADC channle 7 interrupt status
bits : 7 - 14 (8 bit)
ADCMIS8 : ADC channle 8 interrupt status
bits : 8 - 16 (9 bit)
ADCMIS9 : ADC channle 9 interrupt status
bits : 9 - 18 (10 bit)
ADCMIS10 : ADC channle 10 interrupt status
bits : 10 - 20 (11 bit)
ADCMIS11 : ADC channle 11 interrupt status
bits : 11 - 22 (12 bit)
ADCMIS12 : ADC channle 12 interrupt status
bits : 12 - 24 (13 bit)
ADCMIS13 : ADC channle 13 interrupt status
bits : 13 - 26 (14 bit)
ADCMIS14 : ADC channle 14 interrupt status
bits : 14 - 28 (15 bit)
ADCMIS15 : ADC channle 14 interrupt status
bits : 15 - 30 (16 bit)
ADC Interrupt Clear Register
address_offset : 0x54 Bytes (0x0)
size : -1 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
ADCICLR0 : channle 0 status bit clear bit
bits : 0 - 0 (1 bit)
Enumeration: ENUM
1 : 1
clear
End of enumeration elements list.
ADCICLR1 : channle 1 status bit clear bit
bits : 1 - 2 (2 bit)
Enumeration: ENUM
1 : 1
clear
End of enumeration elements list.
ADCICLR2 : channle 2 status bit clear bit
bits : 2 - 4 (3 bit)
Enumeration: ENUM
1 : 1
clear
End of enumeration elements list.
ADCICLR3 : channle 3 status bit clear bit
bits : 3 - 6 (4 bit)
Enumeration: ENUM
1 : 1
clear
End of enumeration elements list.
ADCICLR4 : channle 4 status bit clear bit
bits : 4 - 8 (5 bit)
Enumeration: ENUM
1 : 1
clear
End of enumeration elements list.
ADCICLR5 : channle 5 status bit clear bit
bits : 5 - 10 (6 bit)
Enumeration: ENUM
1 : 1
clear
End of enumeration elements list.
ADCICLR6 : channle 6 status bit clear bit
bits : 6 - 12 (7 bit)
Enumeration: ENUM
1 : 1
clear
End of enumeration elements list.
ADCICLR7 : channle 7 status bit clear bit
bits : 7 - 14 (8 bit)
Enumeration: ENUM
1 : 1
clear
End of enumeration elements list.
ADCICLR8 : channle 8 status bit clear bit
bits : 8 - 16 (9 bit)
Enumeration: ENUM
1 : 1
clear
End of enumeration elements list.
ADCICLR9 : channle 9 status bit clear bit
bits : 9 - 18 (10 bit)
Enumeration: ENUM
1 : 1
clear
End of enumeration elements list.
ADCICLR10 : channle 10 status bit clear bit
bits : 10 - 20 (11 bit)
Enumeration: ENUM
1 : 1
clear
End of enumeration elements list.
ADCICLR11 : channle 11 status bit clear bit
bits : 11 - 22 (12 bit)
Enumeration: ENUM
1 : 1
clear
End of enumeration elements list.
ADCICLR12 : channle 12 status bit clear bit
bits : 12 - 24 (13 bit)
Enumeration: ENUM
1 : 1
clear
End of enumeration elements list.
ADCICLR13 : channle 13 status bit clear bit
bits : 13 - 26 (14 bit)
Enumeration: ENUM
1 : 1
clear
End of enumeration elements list.
ADCICLR14 : channle 14 status bit clear bit
bits : 14 - 28 (15 bit)
Enumeration: ENUM
1 : 1
clear
End of enumeration elements list.
ADCICLR15 : channle 15 status bit clear bit
bits : 15 - 30 (16 bit)
Enumeration: ENUM
1 : 1
clear
End of enumeration elements list.
ADC channle0 conversion value
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ADC channle1 conversion value
address_offset : 0xC Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
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