Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0xFFF byte (0x0)
mem_usage : registers
protection :
GPIO x Pin Mode Select Register
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PMS0 : Px.0
bits : 0 - 1 (2 bit)
Enumeration: ENUM
0 : Pull Up
pull up in
1 : Push Pop Out
push pop out
2 : Open Drain
push pop out
3 : IN
push pop out
End of enumeration elements list.
PMS1 : Px.1
bits : 2 - 5 (4 bit)
Enumeration: ENUM
0 : Pull Up
pull up in
1 : Push Pop Out
push pop out
2 : Open Drain
push pop out
3 : IN
push pop out
End of enumeration elements list.
PMS2 : Px.2
bits : 4 - 9 (6 bit)
Enumeration: ENUM
0 : Pull Up
pull up in
1 : Push Pop Out
push pop out
2 : Open Drain
push pop out
3 : IN
push pop out
End of enumeration elements list.
PMS3 : Px.3
bits : 6 - 13 (8 bit)
Enumeration: ENUM
0 : Pull Up
pull up in
1 : Push Pop Out
push pop out
2 : Open Drain
push pop out
3 : IN
push pop out
End of enumeration elements list.
PMS4 : Px.4
bits : 8 - 17 (10 bit)
Enumeration: ENUM
0 : Pull Up
pull up in
1 : Push Pop Out
push pop out
2 : Open Drain
push pop out
3 : IN
push pop out
End of enumeration elements list.
PMS5 : Px.5
bits : 10 - 21 (12 bit)
Enumeration: ENUM
0 : Pull Up
pull up in
1 : Push Pop Out
push pop out
2 : Open Drain
push pop out
3 : IN
push pop out
End of enumeration elements list.
PMS6 : Px.6
bits : 12 - 25 (14 bit)
Enumeration: ENUM
0 : Pull Up
pull up in
1 : Push Pop Out
push pop out
2 : Open Drain
push pop out
3 : IN
push pop out
End of enumeration elements list.
PMS7 : Px.7
bits : 14 - 29 (16 bit)
Enumeration: ENUM
0 : Pull Up
pull up in
1 : Push Pop Out
push pop out
2 : Open Drain
push pop out
3 : IN
push pop out
End of enumeration elements list.
GPIO x Interrupt Mask Set and Clear Register.
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IMSC0 : Px.0 interrupt mask set and clear register
bits : 0 - 0 (1 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
IMSC1 : Px.1 interrupt mask set and clear register
bits : 1 - 2 (2 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
IMSC2 : Px.2 interrupt mask set and clear register
bits : 2 - 4 (3 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
IMSC3 : Px.3 interrupt mask set and clear register
bits : 3 - 6 (4 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
IMSC4 : Px.4 interrupt mask set and clear register
bits : 4 - 8 (5 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
IMSC5 : Px.5 interrupt mask set and clear register
bits : 5 - 10 (6 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
IMSC6 : Px.6 interrupt mask set and clear register
bits : 6 - 12 (7 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
IMSC7 : Px.7 interrupt mask set and clear register
bits : 7 - 14 (8 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
GPIO x Raw Interrupt Status Register.
address_offset : 0x14 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RIS0 : Px.0 raw interrupt status
bits : 0 - 0 (1 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
RIS1 : Px.1 raw interrupt status
bits : 1 - 2 (2 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
RIS2 : Px.2 raw interrupt status
bits : 2 - 4 (3 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
RIS3 : Px.3 raw interrupt status
bits : 3 - 6 (4 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
RIS4 : Px.4 raw interrupt status
bits : 4 - 8 (5 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
RIS5 : Px.5 raw interrupt status
bits : 5 - 10 (6 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
RIS6 : Px.6 raw interrupt status
bits : 6 - 12 (7 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
RIS7 : Px.7 raw interrupt status
bits : 7 - 14 (8 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
GPIO x Masked Interrupt Status Register.
address_offset : 0x18 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
MIS0 : Px.0 Masked interrupt status
bits : 0 - 0 (1 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
MIS1 : Px.1 Masked interrupt status
bits : 1 - 2 (2 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
MIS2 : Px.2 Masked interrupt status
bits : 2 - 4 (3 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
MIS3 : Px.3 Masked interrupt status
bits : 3 - 6 (4 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
MIS4 : Px.4 Masked interrupt status
bits : 4 - 8 (5 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
MIS5 : Px.5 Masked interrupt status
bits : 5 - 10 (6 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
MIS6 : Px.6 Masked interrupt status
bits : 6 - 12 (7 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
MIS7 : Px.7 Masked interrupt status
bits : 7 - 14 (8 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
GPIO x Interrupt Clear Register
address_offset : 0x1C Bytes (0x0)
size : -1 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
MIS0 : Writing a 1 to this bit clears PX.0 interrupt status
bits : 0 - 0 (1 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
MIS1 : Writing a 1 to this bit clears PX.1 interrupt status
bits : 1 - 2 (2 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
MIS2 : Writing a 1 to this bit clears PX.2 interrupt status
bits : 2 - 4 (3 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
MIS3 : Writing a 1 to this bit clears PX.3 interrupt status
bits : 3 - 6 (4 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
MIS4 : Writing a 1 to this bit clears PX.4 interrupt status
bits : 4 - 8 (5 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
MIS5 : Writing a 1 to this bit clears PX.5 interrupt status
bits : 5 - 10 (6 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
MIS6 : Writing a 1 to this bit clears PX.6 interrupt status
bits : 6 - 12 (7 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
MIS7 : Writing a 1 to this bit clears PX.7 interrupt status
bits : 7 - 14 (8 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
GPIO x Interrupt Type Register
address_offset : 0x20 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ITYPE0 : Px.0 interrupt Type Register.
bits : 0 - 0 (1 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
ITYPE1 : Px.1 interrupt Type Register.
bits : 1 - 2 (2 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
ITYPE2 : Px.2 interrupt Type Register.
bits : 2 - 4 (3 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
ITYPE3 : Px.3 interrupt Type Register.
bits : 3 - 6 (4 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
ITYPE4 : Px.4 interrupt Type Register.
bits : 4 - 8 (5 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
ITYPE5 : Px.5 interrupt Type Register.
bits : 5 - 10 (6 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
ITYPE6 : Px.6 interrupt Type Register.
bits : 6 - 12 (7 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
ITYPE7 : Px.7 interrupt Type Register.
bits : 7 - 14 (8 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
GPIO x Interrupt Value Register
address_offset : 0x24 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IVAL0 : Px.0 interrupt Trigger Value.
bits : 0 - 0 (1 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
IVAL1 : Px.1 interrupt Trigger Value.
bits : 1 - 2 (2 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
IVAL2 : Px.2 interrupt Trigger Value.
bits : 2 - 4 (3 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
IVAL3 : Px.3 interrupt Trigger Value.
bits : 3 - 6 (4 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
IVAL4 : Px.4 interrupt Trigger Value.
bits : 4 - 8 (5 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
IVAL5 : Px.5 interrupt Trigger Value.
bits : 5 - 10 (6 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
IVAL6 : Px.6 interrupt Trigger Value.
bits : 6 - 12 (7 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
IVAL7 : Px.7 interrupt Trigger Value.
bits : 7 - 14 (8 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
GPIO x Interrupt Any Edge Register.
address_offset : 0x28 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IANY0 : Px.0 interrupt Trigger Any Edge.
bits : 0 - 0 (1 bit)
Enumeration: ENUM
0 : depended on IANY
Falling or Rising edge depended on GPIOxIANY0
1 : Any edge
Any edge can trigger
End of enumeration elements list.
IANY1 : Px.1 interrupt Trigger Any Edge.
bits : 1 - 2 (2 bit)
Enumeration: ENUM
0 : depended on IANY
Falling or Rising edge depended on GPIOxIANY0
1 : Any edge
Any edge can trigger
End of enumeration elements list.
IANY2 : Px.2 interrupt Trigger Any Edge.
bits : 2 - 4 (3 bit)
Enumeration: ENUM
0 : depended on IANY
Falling or Rising edge depended on GPIOxIANY0
1 : Any edge
Any edge can trigger
End of enumeration elements list.
IANY3 : Px.3 interrupt Trigger Any Edge.
bits : 3 - 6 (4 bit)
Enumeration: ENUM
0 : depended on IANY
Falling or Rising edge depended on GPIOxIANY0
1 : Any edge
Any edge can trigger
End of enumeration elements list.
IANY4 : Px.4 interrupt Trigger Any Edge.
bits : 4 - 8 (5 bit)
Enumeration: ENUM
0 : depended on IANY
Falling or Rising edge depended on GPIOxIANY0
1 : Any edge
Any edge can trigger
End of enumeration elements list.
IANY5 : Px.5 interrupt Trigger Any Edge.
bits : 5 - 10 (6 bit)
Enumeration: ENUM
0 : depended on IANY
Falling or Rising edge depended on GPIOxIANY0
1 : Any edge
Any edge can trigger
End of enumeration elements list.
IANY6 : Px.6 interrupt Trigger Any Edge.
bits : 6 - 12 (7 bit)
Enumeration: ENUM
0 : depended on IANY
Falling or Rising edge depended on GPIOxIANY0
1 : Any edge
Any edge can trigger
End of enumeration elements list.
IANY7 : Px.7 interrupt Trigger Any Edge.
bits : 7 - 14 (8 bit)
Enumeration: ENUM
0 : depended on IANY
Falling or Rising edge depended on GPIOxIANY0
1 : Any edge
Any edge can trigger
End of enumeration elements list.
GPIO x Data Input De-bounce Register.
address_offset : 0x2C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DIDB0 : Px.0 input De-bounce.
bits : 0 - 0 (1 bit)
Enumeration: ENUM
0 : don't filter
The input data is directly from the pin
1 : filter
There will be two stages DFF filter
End of enumeration elements list.
DIDB1 : Px.1 input De-bounce.
bits : 1 - 2 (2 bit)
Enumeration: ENUM
0 : don't filter
The input data is directly from the pin
1 : filter
There will be two stages DFF filter
End of enumeration elements list.
DIDB2 : Px.2 input De-bounce.
bits : 2 - 4 (3 bit)
Enumeration: ENUM
0 : don't filter
The input data is directly from the pin
1 : filter
There will be two stages DFF filter
End of enumeration elements list.
DIDB3 : Px.3 input De-bounce.
bits : 3 - 6 (4 bit)
Enumeration: ENUM
0 : don't filter
The input data is directly from the pin
1 : filter
There will be two stages DFF filter
End of enumeration elements list.
DIDB4 : Px.4 input De-bounce.
bits : 4 - 8 (5 bit)
Enumeration: ENUM
0 : don't filter
The input data is directly from the pin
1 : filter
There will be two stages DFF filter
End of enumeration elements list.
DIDB5 : Px.5 input De-bounce.
bits : 5 - 10 (6 bit)
Enumeration: ENUM
0 : don't filter
The input data is directly from the pin
1 : filter
There will be two stages DFF filter
End of enumeration elements list.
DIDB6 : Px.6 input De-bounce.
bits : 6 - 12 (7 bit)
Enumeration: ENUM
0 : don't filter
The input data is directly from the pin
1 : filter
There will be two stages DFF filter
End of enumeration elements list.
DIDB7 : Px.7 input De-bounce.
bits : 7 - 14 (8 bit)
Enumeration: ENUM
0 : don't filter
The input data is directly from the pin
1 : filter
There will be two stages DFF filter
End of enumeration elements list.
GPIO x Data Output Set Register.
address_offset : 0x30 Bytes (0x0)
size : -1 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
DOS0 : Data Output Set Register.DO can be set by writing 1 to the DO in the GPIOxDOSET register.Writing a zero to this bit has no effect.
bits : 0 - 0 (1 bit)
Enumeration: ENUM
0 : no effect
no effect
1 : set to high
set to high
End of enumeration elements list.
DOS1 : Data Output Set Register.DO can be set by writing 1 to the DO in the GPIOxDOSET register.Writing a zero to this bit has no effect.
bits : 1 - 2 (2 bit)
Enumeration: ENUM
0 : no effect
no effect
1 : set to high
set to high
End of enumeration elements list.
DOS2 : Data Output Set Register.DO can be set by writing 1 to the DO in the GPIOxDOSET register.Writing a zero to this bit has no effect.
bits : 2 - 4 (3 bit)
Enumeration: ENUM
0 : no effect
no effect
1 : set to high
set to high
End of enumeration elements list.
DOS3 : Data Output Set Register.DO can be set by writing 1 to the DO in the GPIOxDOSET register.Writing a zero to this bit has no effect.
bits : 3 - 6 (4 bit)
Enumeration: ENUM
0 : no effect
no effect
1 : set to high
set to high
End of enumeration elements list.
DOS4 : Data Output Set Register.DO can be set by writing 1 to the DO in the GPIOxDOSET register.Writing a zero to this bit has no effect.
bits : 4 - 8 (5 bit)
Enumeration: ENUM
0 : no effect
no effect
1 : set to high
set to high
End of enumeration elements list.
DOS5 : Data Output Set Register.DO can be set by writing 1 to the DO in the GPIOxDOSET register.Writing a zero to this bit has no effect.
bits : 5 - 10 (6 bit)
Enumeration: ENUM
0 : no effect
no effect
1 : set to high
set to high
End of enumeration elements list.
DOS6 : Data Output Set Register.DO can be set by writing 1 to the DO in the GPIOxDOSET register.Writing a zero to this bit has no effect.
bits : 6 - 12 (7 bit)
Enumeration: ENUM
0 : no effect
no effect
1 : set to high
set to high
End of enumeration elements list.
DOS7 : Data Output Set Register.DO can be set by writing 1 to the DO in the GPIOxDOSET register.Writing a zero to this bit has no effect.
bits : 7 - 14 (8 bit)
Enumeration: ENUM
0 : no effect
no effect
1 : set to high
set to high
End of enumeration elements list.
GPIO x Data Output Clear Register
address_offset : 0x34 Bytes (0x0)
size : -1 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
DOC0 : Data Output clear Register.DO can be cleared by writing 1 to the DOC in the GPIOxDOCLR register. Writing a zero to this bit has no effect.
bits : 0 - 0 (1 bit)
Enumeration: ENUM
0 : no effect
no effect
1 : clear to low
clear to low
End of enumeration elements list.
DOC1 : Data Output clear Register.DO can be cleared by writing 1 to the DOC in the GPIOxDOCLR register. Writing a zero to this bit has no effect.
bits : 1 - 2 (2 bit)
Enumeration: ENUM
0 : no effect
no effect
1 : clear to low
clear to low
End of enumeration elements list.
DOC2 : Data Output clear Register.DO can be cleared by writing 1 to the DOC in the GPIOxDOCLR register. Writing a zero to this bit has no effect.
bits : 2 - 4 (3 bit)
Enumeration: ENUM
0 : no effect
no effect
1 : clear to low
clear to low
End of enumeration elements list.
DOC3 : Data Output clear Register.DO can be cleared by writing 1 to the DOC in the GPIOxDOCLR register. Writing a zero to this bit has no effect.
bits : 3 - 6 (4 bit)
Enumeration: ENUM
0 : no effect
no effect
1 : clear to low
clear to low
End of enumeration elements list.
DOC4 : Data Output clear Register.DO can be cleared by writing 1 to the DOC in the GPIOxDOCLR register. Writing a zero to this bit has no effect.
bits : 4 - 8 (5 bit)
Enumeration: ENUM
0 : no effect
no effect
1 : clear to low
clear to low
End of enumeration elements list.
DOC5 : Data Output clear Register.DO can be cleared by writing 1 to the DOC in the GPIOxDOCLR register. Writing a zero to this bit has no effect.
bits : 5 - 10 (6 bit)
Enumeration: ENUM
0 : no effect
no effect
1 : clear to low
clear to low
End of enumeration elements list.
DOC6 : Data Output clear Register.DO can be cleared by writing 1 to the DOC in the GPIOxDOCLR register. Writing a zero to this bit has no effect.
bits : 6 - 12 (7 bit)
Enumeration: ENUM
0 : no effect
no effect
1 : clear to low
clear to low
End of enumeration elements list.
DOC7 : Data Output clear Register.DO can be cleared by writing 1 to the DOC in the GPIOxDOCLR register. Writing a zero to this bit has no effect.
bits : 7 - 14 (8 bit)
Enumeration: ENUM
0 : no effect
no effect
1 : clear to low
clear to low
End of enumeration elements list.
GPIO x Drive current Set Register.
address_offset : 0x38 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DR0 : Drive curent set bit.
bits : 0 - 0 (1 bit)
Enumeration: ENUM
1 : set to high.
low current.
0 : set to low
large current.
End of enumeration elements list.
DR1 : Drive curent set bit.
bits : 1 - 2 (2 bit)
Enumeration: ENUM
1 : set to high.
low current.
0 : set to low
large current.
End of enumeration elements list.
DR2 : Drive curent set bit.
bits : 2 - 4 (3 bit)
Enumeration: ENUM
1 : set to high.
low current.
0 : set to low
large current.
End of enumeration elements list.
DR3 : Drive curent set bit.
bits : 3 - 6 (4 bit)
Enumeration: ENUM
1 : set to high.
low current.
0 : set to low
large current.
End of enumeration elements list.
DR4 : Drive curent set bit.
bits : 4 - 8 (5 bit)
Enumeration: ENUM
1 : set to high.
low current.
0 : set to low
large current.
End of enumeration elements list.
DR5 : Drive curent set bit.
bits : 5 - 10 (6 bit)
Enumeration: ENUM
1 : set to high.
low current.
0 : set to low
large current.
End of enumeration elements list.
DR6 : Drive curent set bit.
bits : 6 - 12 (7 bit)
Enumeration: ENUM
1 : set to high.
low current.
0 : set to low
large current.
End of enumeration elements list.
DR7 : Drive curent set bit.
bits : 7 - 14 (8 bit)
Enumeration: ENUM
1 : set to high.
low current.
0 : set to low
large current.
End of enumeration elements list.
GPIO x Drive rate Register.
address_offset : 0x3C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SR0 : Drive rate set bit.
bits : 0 - 0 (1 bit)
Enumeration: ENUM
1 : set to high
low speed rate
0 : clear to low
high speed rate.
End of enumeration elements list.
SR1 : Drive rate set bit.
bits : 1 - 2 (2 bit)
Enumeration: ENUM
1 : set to high
low speed rate
0 : clear to low
high speed rate.
End of enumeration elements list.
SR2 : Drive rate set bit.
bits : 2 - 4 (3 bit)
Enumeration: ENUM
1 : set to high
low speed rate
0 : clear to low
high speed rate.
End of enumeration elements list.
SR3 : Drive rate set bit.
bits : 3 - 6 (4 bit)
Enumeration: ENUM
1 : set to high
low speed rate
0 : clear to low
high speed rate.
End of enumeration elements list.
SR4 : Drive rate set bit.
bits : 4 - 8 (5 bit)
Enumeration: ENUM
1 : set to high
low speed rate
0 : clear to low
high speed rate.
End of enumeration elements list.
SR5 : Drive rate set bit.
bits : 5 - 10 (6 bit)
Enumeration: ENUM
1 : set to high
low speed rate
0 : clear to low
high speed rate.
End of enumeration elements list.
SR6 : Drive rate set bit.
bits : 6 - 12 (7 bit)
Enumeration: ENUM
1 : set to high
low speed rate
0 : clear to low
high speed rate.
End of enumeration elements list.
SR7 : Drive rate set bit.
bits : 7 - 14 (8 bit)
Enumeration: ENUM
1 : set to high
low speed rate
0 : clear to low
high speed rate.
End of enumeration elements list.
GPIO x Data Output Write Mask Register.
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DOMx0 : Data Output Write Mask Register.
bits : 0 - 0 (1 bit)
Enumeration: ENUM
0 : GPIOxDO is not masked.
GPIOxDO is not masked.
1 : GPIOxDO is masked. No changed by writing GPIOxDO.
GPIOxDO is masked. No changed by writing GPIOxDO.
End of enumeration elements list.
DOMx1 : Data Output Write Mask Register.
bits : 1 - 2 (2 bit)
Enumeration: ENUM
0 : GPIOxDO is not masked.
GPIOxDO is not masked.
1 : GPIOxDO is masked. No changed by writing GPIOxDO.
GPIOxDO is masked. No changed by writing GPIOxDO.
End of enumeration elements list.
DOMx2 : Data Output Write Mask Register.
bits : 2 - 4 (3 bit)
Enumeration: ENUM
0 : GPIOxDO is not masked.
GPIOxDO is not masked.
1 : GPIOxDO is masked. No changed by writing GPIOxDO.
GPIOxDO is masked. No changed by writing GPIOxDO.
End of enumeration elements list.
DOMx3 : Data Output Write Mask Register.
bits : 3 - 6 (4 bit)
Enumeration: ENUM
0 : GPIOxDO is not masked.
GPIOxDO is not masked.
1 : GPIOxDO is masked. No changed by writing GPIOxDO.
GPIOxDO is masked. No changed by writing GPIOxDO.
End of enumeration elements list.
DOMx4 : Data Output Write Mask Register.
bits : 4 - 8 (5 bit)
Enumeration: ENUM
0 : GPIOxDO is not masked.
GPIOxDO is not masked.
1 : GPIOxDO is masked. No changed by writing GPIOxDO.
GPIOxDO is masked. No changed by writing GPIOxDO.
End of enumeration elements list.
DOMx5 : Data Output Write Mask Register.
bits : 5 - 10 (6 bit)
Enumeration: ENUM
0 : GPIOxDO is not masked.
GPIOxDO is not masked.
1 : GPIOxDO is masked. No changed by writing GPIOxDO.
GPIOxDO is masked. No changed by writing GPIOxDO.
End of enumeration elements list.
DOMx6 : Data Output Write Mask Register.
bits : 6 - 12 (7 bit)
Enumeration: ENUM
0 : GPIOxDO is not masked.
GPIOxDO is not masked.
1 : GPIOxDO is masked. No changed by writing GPIOxDO.
GPIOxDO is masked. No changed by writing GPIOxDO.
End of enumeration elements list.
DOMx7 : Data Output Write Mask Register.
bits : 7 - 14 (8 bit)
Enumeration: ENUM
0 : GPIOxDO is not masked.
GPIOxDO is not masked.
1 : GPIOxDO is masked. No changed by writing GPIOxDO.
GPIOxDO is masked. No changed by writing GPIOxDO.
End of enumeration elements list.
GPIO x Data Output Write Mask Register.
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DOx0 : Px.0
bits : 0 - 0 (1 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
DOx1 : Px.1
bits : 1 - 2 (2 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
DOx2 : Px.2
bits : 2 - 4 (3 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
DOx3 : Px.3
bits : 3 - 6 (4 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
DOx4 : Px.4
bits : 4 - 8 (5 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
DOx5 : Px.5
bits : 5 - 10 (6 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
DOx6 : Px.6
bits : 6 - 12 (7 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
DOx7 : Px.7
bits : 7 - 14 (8 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
GPIO x Data Input Register.
address_offset : 0xC Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DIx0 : Px.0
bits : 0 - 0 (1 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
DIx1 : Px.1
bits : 1 - 2 (2 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
DIx2 : Px.2
bits : 2 - 4 (3 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
DIx3 : Px.3
bits : 3 - 6 (4 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
DIx4 : Px.4
bits : 4 - 8 (5 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
DIx5 : Px.5
bits : 5 - 10 (6 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
DIx6 : Px6
bits : 6 - 12 (7 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
DIx7 : Px.7
bits : 7 - 14 (8 bit)
Enumeration: ENUM
0 : 0
0
1 : 1
1
End of enumeration elements list.
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