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address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection :
I2C control register
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EMPTY : Set by hardware when the I2C transmitted buffer register is empty
bits : 0 - 0 (1 bit)
access : read-only
FULL : Set by hardware when I2C received buffer register is full
bits : 1 - 2 (2 bit)
access : read-only
ACK : The ACK condition bit is set to 1 by hardware when the device responds acknowledge (ACK)
bits : 2 - 4 (3 bit)
access : read-only
SAR_EMPTY : Will set when I2C transmits 1 byte data from I2C Slave
bits : 3 - 6 (4 bit)
access : read-only
STOP : Stop
bits : 4 - 8 (5 bit)
access : read-write
MODE : I2C Master/Slave mode select bit.
bits : 6 - 12 (7 bit)
access : read-write
Enumeration:
0 : Slave
Slave
1 : Master
Master
End of enumeration elements list.
STROBE_PEND : It is used as strobe signal to control I2C circuit in sending SCL clock.
bits : 7 - 14 (8 bit)
access : read-write
GCEN : I2C generate call function enable bit
bits : 8 - 16 (9 bit)
access : read-write
BUF_EN : Buffer function enable bit: (only use for buffer based I2C)
bits : 9 - 18 (10 bit)
access : read-write
STPIF : I2C stop interrupt flag.
bits : 10 - 20 (11 bit)
access : read-only
RST_SW_N : Software reset bit, low active
bits : 14 - 28 (15 bit)
access : read-write
I2C_EN : I2C controller enable bit
bits : 15 - 30 (16 bit)
access : read-write
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
I2C start/stop timing register
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
STASU : I2C start condition setup time detection
bits : 0 - 7 (8 bit)
access : read-write
STAHD : I2C start condition hold time detection
bits : 8 - 23 (16 bit)
access : read-write
I2C SDA digital filter
address_offset : 0x14 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FILTER_TYPE_SDA : Filter noise
bits : 5 - 10 (6 bit)
access : read-write
Enumeration:
0 : 0
filter noise at High and Low level on bus
1 : 1
only filter noise at High or Low level on bus
End of enumeration elements list.
FILTER_LEVEL_SDA : Filter noise at Low or high level on bus
bits : 6 - 12 (7 bit)
access : read-write
Enumeration:
0 : 0
filter noise at Low level on bus
1 : 1
filter noise at High level on bus
End of enumeration elements list.
FILTER_CNT_SDA : Digital filter counter for the high / low level noise of SDA
bits : 8 - 22 (15 bit)
access : read-write
I2C transmit buffer length
address_offset : 0x18 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TX_CNT_CLR : TX_CNT reset bit:
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
0 : 0
reset TX_CNT when I2CTX_IF active
1 : 1
reset TX_CNT when TX_LEN = TX_CNT
End of enumeration elements list.
AL_DIS : Arbitration lost disable. (use in master mode)
bits : 5 - 10 (6 bit)
access : read-write
AUTO_CNT : High level of SCL counter. (0~511system clocks)
bits : 6 - 20 (15 bit)
access : read-write
AUTO_CNT_EN : Auto count high level of SCL (ignore noise when counter is not full)
bits : 15 - 30 (16 bit)
access : read-write
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
I2C receive buffer length
address_offset : 0x1C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SCL_IN_DEL : Select SCL input delay time for hold time requirement
bits : 5 - 11 (7 bit)
access : read-write
Enumeration:
0 : 00
bypass
1 : 01
30ns
2 : 10
200ns
3 : 11
400ns
End of enumeration elements list.
SDA_IN_DEL : Select SDA input delay time for hold time requirement
bits : 7 - 15 (9 bit)
access : read-write
Enumeration:
0 : 00
bypass
1 : 01
30ns
2 : 10
200ns
3 : 11
400ns
End of enumeration elements list.
FILTER_CNT_LOW : Digital filter counter for the high level noise of SCL
bits : 9 - 24 (16 bit)
access : read-write
I2C received data number for Non-ack response
address_offset : 0x20 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FILTER_TYPE_SCL : Response by ACK or NACK
bits : 5 - 10 (6 bit)
access : read-write
Enumeration:
0 : 0
filter noise at High and Low level on bus
1 : 1
only filter noise at High or Low level on bus
End of enumeration elements list.
FILTER_LEVEL_SCL : Response by ACK or NACK
bits : 6 - 12 (7 bit)
access : read-write
Enumeration:
0 : 0
filter noise at Low level on bus
1 : 1
filter noise at High level on bus
End of enumeration elements list.
ACKXNACK : Response by ACK or NACK
bits : 7 - 14 (8 bit)
access : read-write
Enumeration:
0 : NACK
NACK response
1 : ACK
ACK response
End of enumeration elements list.
FILTER_CNT_SCL : Digital filter counter for the high / low level noise of SCL
bits : 8 - 22 (15 bit)
access : read-write
ADDR_SYNC : Chcek address with sync or async SCL/SDA.
bits : 15 - 30 (16 bit)
access : read-write
Enumeration:
0 : ASYNC
Chcek address with async SCL/SDA.
1 : SYNC
Chcek address with sync SCL/SDA.
End of enumeration elements list.
SMbus Time Out 1 register
address_offset : 0x24 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TO1TR : Timer Reload Value
bits : 0 - 7 (8 bit)
access : read-write
TO1TPRE : Timer Pre-scaler Selection for 8-bit
bits : 8 - 18 (11 bit)
access : read-write
TO1SF : SMbus Time Out 1 status flag.
bits : 14 - 28 (15 bit)
access : read-write
Enumeration:
0 : NonTrigger
Interrupt non-trigger
1 : Trigger
Interrupt trigger
End of enumeration elements list.
TO1EN : SMbus time out function enable bit: (standard 35ms)
bits : 15 - 30 (16 bit)
access : read-write
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
SMbus Time Out 2 register
address_offset : 0x28 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TO2TR : Timer Reload Value
bits : 0 - 7 (8 bit)
access : read-write
TO2TPRE : Timer Pre-scaler Selection for 8-bit
bits : 8 - 18 (11 bit)
access : read-write
TO2SF : SMbus Time Out 2 status flag.
bits : 14 - 28 (15 bit)
access : read-write
Enumeration:
0 : NonTrigger
Interrupt non-trigger
1 : Trigger
Interrupt trigger
End of enumeration elements list.
TO2EN : SMbus time out function enable bit: (standard 25ms)
bits : 15 - 30 (16 bit)
access : read-write
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
SMbus Time Out 3 register
address_offset : 0x2C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TO3TR : Timer Reload Value
bits : 0 - 7 (8 bit)
access : read-write
TO3TPRE : Timer Pre-scaler Selection for 8-bit
bits : 8 - 18 (11 bit)
access : read-write
TO3SF : SMbus Time Out 3 status flag.
bits : 14 - 28 (15 bit)
access : read-write
Enumeration:
0 : NonTrigger
Interrupt non-trigger
1 : Trigger
Interrupt trigger
End of enumeration elements list.
TO3EN : SMbus time out function enable bit: (standard 10ms)
bits : 15 - 30 (16 bit)
access : read-write
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
I2C Dive count
address_offset : 0x34 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DIVCNT : I2C APB divided count
bits : 0 - 7 (8 bit)
access : read-write
SBFEN : Sleep buffer mode function enable bit.
bits : 13 - 26 (14 bit)
access : read-write
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
I2C Deglitch and Delay control register
address_offset : 0x3C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SDA_Delay_Sel : SDA_Delay_Select (according table)
bits : 0 - 2 (3 bit)
access : read-write
SDA_Delay_En : SCL_Delay_Enable_control
bits : 3 - 6 (4 bit)
access : read-write
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
SCL_Delay_Sel : SCL_Delay_Select (according table) Select
bits : 4 - 10 (7 bit)
access : read-write
SCL_Delay_En : SCL_Delay_Enable_control
bits : 7 - 14 (8 bit)
access : read-write
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
SDA_Degitch_Sel : SDA_Degitch_Channel Select
bits : 8 - 18 (11 bit)
access : read-write
Enumeration:
0 : 000
65ns
1 : 001
85ns
2 : 010
100ns
End of enumeration elements list.
SDA_Degitch_En : SDA_Degitch_Enable_control
bits : 11 - 22 (12 bit)
access : read-write
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
SCL_Degitch_Sel : SCL_Degitch_Channel Select
bits : 12 - 26 (15 bit)
access : read-write
Enumeration:
0 : 000
65ns
1 : 001
85ns
2 : 010
100ns
End of enumeration elements list.
SCL_Degitch_En : SCL_Degitch_Enable_control
bits : 15 - 30 (16 bit)
access : read-write
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
I2C slave address register
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RnW : This bit is a Read/Write transaction control bit.
bits : 0 - 0 (1 bit)
access : read-write
SAR : Applies when I2C module is used as master device for I2C application
bits : 1 - 8 (8 bit)
access : read-write
SDA_DEL_SLEEP : Select SDA output delay time for hold time requirement
bits : 8 - 17 (10 bit)
access : read-write
Enumeration:
0 : 00
100ns
1 : 01
300ns
2 : 10
400ns
3 : 11
500ns
End of enumeration elements list.
SDA_DEL_NOR : Select SDA output delay time for hold time requirement. (normal mode)
bits : 10 - 21 (12 bit)
access : read-write
Enumeration:
0 : 00
0ns
1 : 01
100ns
2 : 10
200ns
3 : 11
300ns
End of enumeration elements list.
SDA_DEGLITCH_SEL : Select SDA deglitch delay time
bits : 12 - 25 (14 bit)
access : read-write
Enumeration:
0 : 00
50ns
1 : 01
200ns
2 : 10
400ns
3 : 11
Bypass
End of enumeration elements list.
SCL_DEGLITCH_SEL : Select SCL deglitch delay time
bits : 14 - 29 (16 bit)
access : read-write
Enumeration:
0 : 00
50ns
1 : 01
200ns
2 : 10
400ns
3 : 11
Bypass
End of enumeration elements list.
I2C transmit buffer length (for eWD720)
address_offset : 0x40 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TX_LEN : I2C TX transmission data length (max length = 20)
bits : 0 - 4 (5 bit)
access : read-write
I2C receive buffer length(for eWD720)
address_offset : 0x44 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RX_LEN : I2C TX transmission data length (max length = 20)
bits : 0 - 4 (5 bit)
access : read-only
I2C received data number for Non-ack response (for eWD720)
address_offset : 0x48 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RX_NACK : I2C TX transmission data length (max length = 20)
bits : 0 - 4 (5 bit)
access : read-write
I2C device address register0
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ADDR : This register stores the address of I2C module
bits : 0 - 6 (7 bit)
access : read-write
BUSY : I2C bus busy
bits : 7 - 14 (8 bit)
access : read-only
ADDRH : This register stores the address of I2C module
bits : 8 - 18 (11 bit)
access : read-write
I2C_STP_IEN : STOP interrupt enable bit
bits : 12 - 24 (13 bit)
access : read-write
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
I2C_PEND_DIS : Auto stretch SCL control bit
bits : 13 - 27 (15 bit)
access : read-write
Enumeration:
0 : 00
auto stretch SCL (until PEND bit is clear)
1 : 01
auto stretch SCL (256 sys clock, need to clear PEND bit before next byte)
2 : 10
auto stretch SCL (512 sys clock, need to clear PEND bit before next byte)
3 : 11
disable auto stretch SCL
End of enumeration elements list.
I2C Data Buffer Register
address_offset : 0xC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BX : Transmitting mode
bits : 0 - 7 (8 bit)
access : read-write
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