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GPIO

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :

Registers

MODER

IDR

ODR

BSRR

LCKR

AFRL

AFRH

BRR

OTYPER

OSPEEDR

PUPDR


MODER

GPIO port mode register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODER MODER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MODER0 MODER1 MODER2 MODER3 MODER4 MODER5 MODER6 MODER7 MODER8 MODER9 MODER10 MODER11 MODER12 MODER13 MODER14 MODER15

MODER0 : Port x configuration bits (y = 0..15)
bits : 0 - 1 (2 bit)

MODER1 : Port x configuration bits (y = 0..15)
bits : 2 - 3 (2 bit)

MODER2 : Port x configuration bits (y = 0..15)
bits : 4 - 5 (2 bit)

MODER3 : Port x configuration bits (y = 0..15)
bits : 6 - 7 (2 bit)

MODER4 : Port x configuration bits (y = 0..15)
bits : 8 - 9 (2 bit)

MODER5 : Port x configuration bits (y = 0..15)
bits : 10 - 11 (2 bit)

MODER6 : Port x configuration bits (y = 0..15)
bits : 12 - 13 (2 bit)

MODER7 : Port x configuration bits (y = 0..15)
bits : 14 - 15 (2 bit)

MODER8 : Port x configuration bits (y = 0..15)
bits : 16 - 17 (2 bit)

MODER9 : Port x configuration bits (y = 0..15)
bits : 18 - 19 (2 bit)

MODER10 : Port x configuration bits (y = 0..15)
bits : 20 - 21 (2 bit)

MODER11 : Port x configuration bits (y = 0..15)
bits : 22 - 23 (2 bit)

MODER12 : Port x configuration bits (y = 0..15)
bits : 24 - 25 (2 bit)

MODER13 : Port x configuration bits (y = 0..15)
bits : 26 - 27 (2 bit)

MODER14 : Port x configuration bits (y = 0..15)
bits : 28 - 29 (2 bit)

MODER15 : Port x configuration bits (y = 0..15)
bits : 30 - 31 (2 bit)


IDR

GPIO port input data register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IDR IDR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IDR0 IDR1 IDR2 IDR3 IDR4 IDR5 IDR6 IDR7 IDR8 IDR9 IDR10 IDR11 IDR12 IDR13 IDR14 IDR15

IDR0 : Port input data (y = 0..15)
bits : 0 - 0 (1 bit)

IDR1 : Port input data (y = 0..15)
bits : 1 - 1 (1 bit)

IDR2 : Port input data (y = 0..15)
bits : 2 - 2 (1 bit)

IDR3 : Port input data (y = 0..15)
bits : 3 - 3 (1 bit)

IDR4 : Port input data (y = 0..15)
bits : 4 - 4 (1 bit)

IDR5 : Port input data (y = 0..15)
bits : 5 - 5 (1 bit)

IDR6 : Port input data (y = 0..15)
bits : 6 - 6 (1 bit)

IDR7 : Port input data (y = 0..15)
bits : 7 - 7 (1 bit)

IDR8 : Port input data (y = 0..15)
bits : 8 - 8 (1 bit)

IDR9 : Port input data (y = 0..15)
bits : 9 - 9 (1 bit)

IDR10 : Port input data (y = 0..15)
bits : 10 - 10 (1 bit)

IDR11 : Port input data (y = 0..15)
bits : 11 - 11 (1 bit)

IDR12 : Port input data (y = 0..15)
bits : 12 - 12 (1 bit)

IDR13 : Port input data (y = 0..15)
bits : 13 - 13 (1 bit)

IDR14 : Port input data (y = 0..15)
bits : 14 - 14 (1 bit)

IDR15 : Port input data (y = 0..15)
bits : 15 - 15 (1 bit)


ODR

GPIO port output data register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ODR ODR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ODR0 ODR1 ODR2 ODR3 ODR4 ODR5 ODR6 ODR7 ODR8 ODR9 ODR10 ODR11 ODR12 ODR13 ODR14 ODR15

ODR0 : Port output data (y = 0..15)
bits : 0 - 0 (1 bit)

ODR1 : Port output data (y = 0..15)
bits : 1 - 1 (1 bit)

ODR2 : Port output data (y = 0..15)
bits : 2 - 2 (1 bit)

ODR3 : Port output data (y = 0..15)
bits : 3 - 3 (1 bit)

ODR4 : Port output data (y = 0..15)
bits : 4 - 4 (1 bit)

ODR5 : Port output data (y = 0..15)
bits : 5 - 5 (1 bit)

ODR6 : Port output data (y = 0..15)
bits : 6 - 6 (1 bit)

ODR7 : Port output data (y = 0..15)
bits : 7 - 7 (1 bit)

ODR8 : Port output data (y = 0..15)
bits : 8 - 8 (1 bit)

ODR9 : Port output data (y = 0..15)
bits : 9 - 9 (1 bit)

ODR10 : Port output data (y = 0..15)
bits : 10 - 10 (1 bit)

ODR11 : Port output data (y = 0..15)
bits : 11 - 11 (1 bit)

ODR12 : Port output data (y = 0..15)
bits : 12 - 12 (1 bit)

ODR13 : Port output data (y = 0..15)
bits : 13 - 13 (1 bit)

ODR14 : Port output data (y = 0..15)
bits : 14 - 14 (1 bit)

ODR15 : Port output data (y = 0..15)
bits : 15 - 15 (1 bit)


BSRR

GPIO port bit set/reset register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

BSRR BSRR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BS0 BS1 BS2 BS3 BS4 BS5 BS6 BS7 BS8 BS9 BS10 BS11 BS12 BS13 BS14 BS15 BR0 BR1 BR2 BR3 BR4 BR5 BR6 BR7 BR8 BR9 BR10 BR11 BR12 BR13 BR14 BR15

BS0 : Port x set bit y (y= 0..15)
bits : 0 - 0 (1 bit)

BS1 : Port x set bit y (y= 0..15)
bits : 1 - 1 (1 bit)

BS2 : Port x set bit y (y= 0..15)
bits : 2 - 2 (1 bit)

BS3 : Port x set bit y (y= 0..15)
bits : 3 - 3 (1 bit)

BS4 : Port x set bit y (y= 0..15)
bits : 4 - 4 (1 bit)

BS5 : Port x set bit y (y= 0..15)
bits : 5 - 5 (1 bit)

BS6 : Port x set bit y (y= 0..15)
bits : 6 - 6 (1 bit)

BS7 : Port x set bit y (y= 0..15)
bits : 7 - 7 (1 bit)

BS8 : Port x set bit y (y= 0..15)
bits : 8 - 8 (1 bit)

BS9 : Port x set bit y (y= 0..15)
bits : 9 - 9 (1 bit)

BS10 : Port x set bit y (y= 0..15)
bits : 10 - 10 (1 bit)

BS11 : Port x set bit y (y= 0..15)
bits : 11 - 11 (1 bit)

BS12 : Port x set bit y (y= 0..15)
bits : 12 - 12 (1 bit)

BS13 : Port x set bit y (y= 0..15)
bits : 13 - 13 (1 bit)

BS14 : Port x set bit y (y= 0..15)
bits : 14 - 14 (1 bit)

BS15 : Port x set bit y (y= 0..15)
bits : 15 - 15 (1 bit)

BR0 : Port x set bit y (y= 0..15)
bits : 16 - 16 (1 bit)

BR1 : Port x reset bit y (y = 0..15)
bits : 17 - 17 (1 bit)

BR2 : Port x reset bit y (y = 0..15)
bits : 18 - 18 (1 bit)

BR3 : Port x reset bit y (y = 0..15)
bits : 19 - 19 (1 bit)

BR4 : Port x reset bit y (y = 0..15)
bits : 20 - 20 (1 bit)

BR5 : Port x reset bit y (y = 0..15)
bits : 21 - 21 (1 bit)

BR6 : Port x reset bit y (y = 0..15)
bits : 22 - 22 (1 bit)

BR7 : Port x reset bit y (y = 0..15)
bits : 23 - 23 (1 bit)

BR8 : Port x reset bit y (y = 0..15)
bits : 24 - 24 (1 bit)

BR9 : Port x reset bit y (y = 0..15)
bits : 25 - 25 (1 bit)

BR10 : Port x reset bit y (y = 0..15)
bits : 26 - 26 (1 bit)

BR11 : Port x reset bit y (y = 0..15)
bits : 27 - 27 (1 bit)

BR12 : Port x reset bit y (y = 0..15)
bits : 28 - 28 (1 bit)

BR13 : Port x reset bit y (y = 0..15)
bits : 29 - 29 (1 bit)

BR14 : Port x reset bit y (y = 0..15)
bits : 30 - 30 (1 bit)

BR15 : Port x reset bit y (y = 0..15)
bits : 31 - 31 (1 bit)


LCKR

GPIO port configuration lock register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LCKR LCKR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LCK0 LCK1 LCK2 LCK3 LCK4 LCK5 LCK6 LCK7 LCK8 LCK9 LCK10 LCK11 LCK12 LCK13 LCK14 LCK15 LCKK

LCK0 : Port x lock bit y (y= 0..15)
bits : 0 - 0 (1 bit)

LCK1 : Port x lock bit y (y= 0..15)
bits : 1 - 1 (1 bit)

LCK2 : Port x lock bit y (y= 0..15)
bits : 2 - 2 (1 bit)

LCK3 : Port x lock bit y (y= 0..15)
bits : 3 - 3 (1 bit)

LCK4 : Port x lock bit y (y= 0..15)
bits : 4 - 4 (1 bit)

LCK5 : Port x lock bit y (y= 0..15)
bits : 5 - 5 (1 bit)

LCK6 : Port x lock bit y (y= 0..15)
bits : 6 - 6 (1 bit)

LCK7 : Port x lock bit y (y= 0..15)
bits : 7 - 7 (1 bit)

LCK8 : Port x lock bit y (y= 0..15)
bits : 8 - 8 (1 bit)

LCK9 : Port x lock bit y (y= 0..15)
bits : 9 - 9 (1 bit)

LCK10 : Port x lock bit y (y= 0..15)
bits : 10 - 10 (1 bit)

LCK11 : Port x lock bit y (y= 0..15)
bits : 11 - 11 (1 bit)

LCK12 : Port x lock bit y (y= 0..15)
bits : 12 - 12 (1 bit)

LCK13 : Port x lock bit y (y= 0..15)
bits : 13 - 13 (1 bit)

LCK14 : Port x lock bit y (y= 0..15)
bits : 14 - 14 (1 bit)

LCK15 : Port x lock bit y (y= 0..15)
bits : 15 - 15 (1 bit)

LCKK : Port x lock bit y
bits : 16 - 16 (1 bit)


AFRL

GPIO alternate function low register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AFRL AFRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AFRL0 AFRL1 AFRL2 AFRL3 AFRL4 AFRL5 AFRL6 AFRL7

AFRL0 : Alternate function selection for port x bit y (y = 0..7)
bits : 0 - 3 (4 bit)

AFRL1 : Alternate function selection for port x bit y (y = 0..7)
bits : 4 - 7 (4 bit)

AFRL2 : Alternate function selection for port x bit y (y = 0..7)
bits : 8 - 11 (4 bit)

AFRL3 : Alternate function selection for port x bit y (y = 0..7)
bits : 12 - 15 (4 bit)

AFRL4 : Alternate function selection for port x bit y (y = 0..7)
bits : 16 - 19 (4 bit)

AFRL5 : Alternate function selection for port x bit y (y = 0..7)
bits : 20 - 23 (4 bit)

AFRL6 : Alternate function selection for port x bit y (y = 0..7)
bits : 24 - 27 (4 bit)

AFRL7 : Alternate function selection for port x bit y (y = 0..7)
bits : 28 - 31 (4 bit)


AFRH

GPIO alternate function high register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AFRH AFRH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AFRH8 AFRH9 AFRH10 AFRH11 AFRH12 AFRH13 AFRH14 AFRH15

AFRH8 : Alternate function selection for port x bit y (y = 8..15)
bits : 0 - 3 (4 bit)

AFRH9 : Alternate function selection for port x bit y (y = 8..15)
bits : 4 - 7 (4 bit)

AFRH10 : Alternate function selection for port x bit y (y = 8..15)
bits : 8 - 11 (4 bit)

AFRH11 : Alternate function selection for port x bit y (y = 8..15)
bits : 12 - 15 (4 bit)

AFRH12 : Alternate function selection for port x bit y (y = 8..15)
bits : 16 - 19 (4 bit)

AFRH13 : Alternate function selection for port x bit y (y = 8..15)
bits : 20 - 23 (4 bit)

AFRH14 : Alternate function selection for port x bit y (y = 8..15)
bits : 24 - 27 (4 bit)

AFRH15 : Alternate function selection for port x bit y (y = 8..15)
bits : 28 - 31 (4 bit)


BRR

Port bit reset register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

BRR BRR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BR0 BR1 BR2 BR3 BR4 BR5 BR6 BR7 BR8 BR9 BR10 BR11 BR12 BR13 BR14 BR15

BR0 : Port x Reset bit y
bits : 0 - 0 (1 bit)

BR1 : Port x Reset bit y
bits : 1 - 1 (1 bit)

BR2 : Port x Reset bit y
bits : 2 - 2 (1 bit)

BR3 : Port x Reset bit y
bits : 3 - 3 (1 bit)

BR4 : Port x Reset bit y
bits : 4 - 4 (1 bit)

BR5 : Port x Reset bit y
bits : 5 - 5 (1 bit)

BR6 : Port x Reset bit y
bits : 6 - 6 (1 bit)

BR7 : Port x Reset bit y
bits : 7 - 7 (1 bit)

BR8 : Port x Reset bit y
bits : 8 - 8 (1 bit)

BR9 : Port x Reset bit y
bits : 9 - 9 (1 bit)

BR10 : Port x Reset bit y
bits : 10 - 10 (1 bit)

BR11 : Port x Reset bit y
bits : 11 - 11 (1 bit)

BR12 : Port x Reset bit y
bits : 12 - 12 (1 bit)

BR13 : Port x Reset bit y
bits : 13 - 13 (1 bit)

BR14 : Port x Reset bit y
bits : 14 - 14 (1 bit)

BR15 : Port x Reset bit y
bits : 15 - 15 (1 bit)


OTYPER

GPIO port output type register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OTYPER OTYPER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OT0 OT1 OT2 OT3 OT4 OT5 OT6 OT7 OT8 OT9 OT10 OT11 OT12 OT13 OT14 OT15

OT0 : Port x configuration bit 0
bits : 0 - 0 (1 bit)

OT1 : Port x configuration bit 1
bits : 1 - 1 (1 bit)

OT2 : Port x configuration bit 2
bits : 2 - 2 (1 bit)

OT3 : Port x configuration bit 3
bits : 3 - 3 (1 bit)

OT4 : Port x configuration bit 4
bits : 4 - 4 (1 bit)

OT5 : Port x configuration bit 5
bits : 5 - 5 (1 bit)

OT6 : Port x configuration bit 6
bits : 6 - 6 (1 bit)

OT7 : Port x configuration bit 7
bits : 7 - 7 (1 bit)

OT8 : Port x configuration bit 8
bits : 8 - 8 (1 bit)

OT9 : Port x configuration bit 9
bits : 9 - 9 (1 bit)

OT10 : Port x configuration bit 10
bits : 10 - 10 (1 bit)

OT11 : Port x configuration bit 11
bits : 11 - 11 (1 bit)

OT12 : Port x configuration bit 12
bits : 12 - 12 (1 bit)

OT13 : Port x configuration bit 13
bits : 13 - 13 (1 bit)

OT14 : Port x configuration bit 14
bits : 14 - 14 (1 bit)

OT15 : Port x configuration bit 15
bits : 15 - 15 (1 bit)


OSPEEDR

GPIO port output speed register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OSPEEDR OSPEEDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OSPEEDR0 OSPEEDR1 OSPEEDR2 OSPEEDR3 OSPEEDR4 OSPEEDR5 OSPEEDR6 OSPEEDR7 OSPEEDR8 OSPEEDR9 OSPEEDR10 OSPEEDR11 OSPEEDR12 OSPEEDR13 OSPEEDR14 OSPEEDR15

OSPEEDR0 : Port x configuration bits (y = 0..15)
bits : 0 - 1 (2 bit)

OSPEEDR1 : Port x configuration bits (y = 0..15)
bits : 2 - 3 (2 bit)

OSPEEDR2 : Port x configuration bits (y = 0..15)
bits : 4 - 5 (2 bit)

OSPEEDR3 : Port x configuration bits (y = 0..15)
bits : 6 - 7 (2 bit)

OSPEEDR4 : Port x configuration bits (y = 0..15)
bits : 8 - 9 (2 bit)

OSPEEDR5 : Port x configuration bits (y = 0..15)
bits : 10 - 11 (2 bit)

OSPEEDR6 : Port x configuration bits (y = 0..15)
bits : 12 - 13 (2 bit)

OSPEEDR7 : Port x configuration bits (y = 0..15)
bits : 14 - 15 (2 bit)

OSPEEDR8 : Port x configuration bits (y = 0..15)
bits : 16 - 17 (2 bit)

OSPEEDR9 : Port x configuration bits (y = 0..15)
bits : 18 - 19 (2 bit)

OSPEEDR10 : Port x configuration bits (y = 0..15)
bits : 20 - 21 (2 bit)

OSPEEDR11 : Port x configuration bits (y = 0..15)
bits : 22 - 23 (2 bit)

OSPEEDR12 : Port x configuration bits (y = 0..15)
bits : 24 - 25 (2 bit)

OSPEEDR13 : Port x configuration bits (y = 0..15)
bits : 26 - 27 (2 bit)

OSPEEDR14 : Port x configuration bits (y = 0..15)
bits : 28 - 29 (2 bit)

OSPEEDR15 : Port x configuration bits (y = 0..15)
bits : 30 - 31 (2 bit)


PUPDR

GPIO port pull-up/pull-down register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PUPDR PUPDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PUPDR0 PUPDR1 PUPDR2 PUPDR3 PUPDR4 PUPDR5 PUPDR6 PUPDR7 PUPDR8 PUPDR9 PUPDR10 PUPDR11 PUPDR12 PUPDR13 PUPDR14 PUPDR15

PUPDR0 : Port x configuration bits (y = 0..15)
bits : 0 - 1 (2 bit)

PUPDR1 : Port x configuration bits (y = 0..15)
bits : 2 - 3 (2 bit)

PUPDR2 : Port x configuration bits (y = 0..15)
bits : 4 - 5 (2 bit)

PUPDR3 : Port x configuration bits (y = 0..15)
bits : 6 - 7 (2 bit)

PUPDR4 : Port x configuration bits (y = 0..15)
bits : 8 - 9 (2 bit)

PUPDR5 : Port x configuration bits (y = 0..15)
bits : 10 - 11 (2 bit)

PUPDR6 : Port x configuration bits (y = 0..15)
bits : 12 - 13 (2 bit)

PUPDR7 : Port x configuration bits (y = 0..15)
bits : 14 - 15 (2 bit)

PUPDR8 : Port x configuration bits (y = 0..15)
bits : 16 - 17 (2 bit)

PUPDR9 : Port x configuration bits (y = 0..15)
bits : 18 - 19 (2 bit)

PUPDR10 : Port x configuration bits (y = 0..15)
bits : 20 - 21 (2 bit)

PUPDR11 : Port x configuration bits (y = 0..15)
bits : 22 - 23 (2 bit)

PUPDR12 : Port x configuration bits (y = 0..15)
bits : 24 - 25 (2 bit)

PUPDR13 : Port x configuration bits (y = 0..15)
bits : 26 - 27 (2 bit)

PUPDR14 : Port x configuration bits (y = 0..15)
bits : 28 - 29 (2 bit)

PUPDR15 : Port x configuration bits (y = 0..15)
bits : 30 - 31 (2 bit)



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