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Flash

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :

Registers

ACR

CR

AR

OBR

WRPR

KEYR

OPTKEYR

SR


ACR

Flash access control register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ACR ACR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LATENCY PRFTBE PRFTBS

LATENCY : LATENCY
bits : 0 - 2 (3 bit)
access : read-write

PRFTBE : PRFTBE
bits : 4 - 4 (1 bit)
access : read-write

PRFTBS : PRFTBS
bits : 5 - 5 (1 bit)
access : read-only


CR

Flash control register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CR CR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PG PER MER OPTPG OPTER STRT LOCK OPTWRE ERRIE EOPIE FORCE_OPTLOAD

PG : Programming
bits : 0 - 0 (1 bit)

PER : Page erase
bits : 1 - 1 (1 bit)

MER : Mass erase
bits : 2 - 2 (1 bit)

OPTPG : Option byte programming
bits : 4 - 4 (1 bit)

OPTER : Option byte erase
bits : 5 - 5 (1 bit)

STRT : Start
bits : 6 - 6 (1 bit)

LOCK : Lock
bits : 7 - 7 (1 bit)

OPTWRE : Option bytes write enable
bits : 9 - 9 (1 bit)

ERRIE : Error interrupt enable
bits : 10 - 10 (1 bit)

EOPIE : End of operation interrupt enable
bits : 12 - 12 (1 bit)

FORCE_OPTLOAD : Force option byte loading
bits : 13 - 13 (1 bit)


AR

Flash address register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

AR AR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FAR

FAR : Flash address
bits : 0 - 31 (32 bit)


OBR

Option byte register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

OBR OBR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OPTERR LEVEL1_PROT LEVEL2_PROT WDG_SW nRST_STOP nRST_STDBY BOOT1 VDDA_MONITOR Data0 Data1

OPTERR : Option byte error
bits : 0 - 0 (1 bit)

LEVEL1_PROT : Level 1 protection status
bits : 1 - 1 (1 bit)

LEVEL2_PROT : Level 2 protection status
bits : 2 - 2 (1 bit)

WDG_SW : WDG_SW
bits : 8 - 8 (1 bit)

nRST_STOP : nRST_STOP
bits : 9 - 9 (1 bit)

nRST_STDBY : nRST_STDBY
bits : 10 - 10 (1 bit)

BOOT1 : BOOT1
bits : 12 - 12 (1 bit)

VDDA_MONITOR : VDDA_MONITOR
bits : 13 - 13 (1 bit)

Data0 : Data0
bits : 16 - 23 (8 bit)

Data1 : Data1
bits : 24 - 31 (8 bit)


WRPR

Write protection register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

WRPR WRPR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WRP

WRP : Write protect
bits : 0 - 31 (32 bit)


KEYR

Flash key register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

KEYR KEYR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FKEYR

FKEYR : Flash Key
bits : 0 - 31 (32 bit)


OPTKEYR

Flash option key register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

OPTKEYR OPTKEYR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OPTKEYR

OPTKEYR : Option byte key
bits : 0 - 31 (32 bit)


SR

Flash status register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SR SR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BSY PGERR WRPRT EOP

BSY : Busy
bits : 0 - 0 (1 bit)
access : read-only

PGERR : Programming error
bits : 2 - 2 (1 bit)
access : read-write

WRPRT : Write protection error
bits : 4 - 4 (1 bit)
access : read-write

EOP : End of operation
bits : 5 - 5 (1 bit)
access : read-write



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