\n

SVD

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection :

Registers

CFGR

VSR

CR

IER

ISR


CFGR

SVD Config Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFGR CFGR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MOD DFEN LVL ADSVD_EN ADSVD_SEL

MOD : MOD field description
bits : 2 - 2 (1 bit)

DFEN : DFEN field description
bits : 3 - 3 (1 bit)

LVL : LVL field description
bits : 4 - 7 (4 bit)

ADSVD_EN : ADSVD_EN field description
bits : 8 - 8 (1 bit)

ADSVD_SEL : ADSVD_SEL field description
bits : 9 - 11 (3 bit)


VSR

SVD reference Voltage Select Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VSR VSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 V1P0EN V1P1EN V1P2EN

V1P0EN : V1P0EN field description
bits : 0 - 0 (1 bit)

V1P1EN : V1P1EN field description
bits : 1 - 1 (1 bit)

V1P2EN : V1P2EN field description
bits : 2 - 2 (1 bit)


CR

SVD Control Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CR CR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EN SVSEN TE

EN : EN field description
bits : 0 - 0 (1 bit)

SVSEN : SVSEN field description
bits : 1 - 1 (1 bit)

TE : TE field description
bits : 8 - 8 (1 bit)


IER

SVD Interrupt Enable Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IER IER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRIE PFIE

PRIE : PRIE field description
bits : 0 - 0 (1 bit)

PFIE : PFIE field description
bits : 1 - 1 (1 bit)


ISR

SVD Interrupt Status Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ISR ISR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRF PFF SVDR SVDO ADLVDO

PRF : PRF field description
bits : 0 - 0 (1 bit)
access : read-write

PFF : PFF field description
bits : 1 - 1 (1 bit)
access : read-write

SVDR : SVDR field description
bits : 7 - 7 (1 bit)
access : read-only

SVDO : SVDO field description
bits : 8 - 8 (1 bit)
access : read-only

ADLVDO : ADLVDO field description
bits : 16 - 16 (1 bit)
access : read-only



Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !

This website is sponsored by EmbeetleEmbeetle, an IDE designed from scratch for embedded software developers.