\n
address_offset : 0x0 Bytes (0x0)
size : 0x1C byte (0x0)
mem_usage : registers
protection :
UART0 Control Status Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TXEN : TXEN field description
bits : 0 - 0 (1 bit)
access : read-write
RXEN : RXEN field description
bits : 1 - 1 (1 bit)
access : read-write
TXPOL : TXPOL field description
bits : 2 - 2 (1 bit)
access : read-write
RXPOL : RXPOL field description
bits : 3 - 3 (1 bit)
access : read-write
PARITY : PARITY field description
bits : 4 - 5 (2 bit)
access : read-write
PDSEL : PDSEL field description
bits : 6 - 7 (2 bit)
access : read-write
STOPCFG : STOPCFG field description
bits : 8 - 8 (1 bit)
access : read-write
BITORD : BITORD field description
bits : 9 - 9 (1 bit)
access : read-write
DMATXIFCFG : DMATXIFCFG field description
bits : 10 - 10 (1 bit)
access : read-write
NEWUP : NEWUP field description
bits : 11 - 11 (1 bit)
access : read-write
IOSWAP : IOSWAP field description
bits : 12 - 12 (1 bit)
access : read-write
RXTOEN : RXTOEN field description
bits : 16 - 16 (1 bit)
access : read-write
TXIREN : TXIREN field description
bits : 17 - 17 (1 bit)
access : read-write
BUSY : BUSY field description
bits : 24 - 24 (1 bit)
access : read-only
UART0 Receive Buffer
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RXBUF : RXBUF field description
bits : 0 - 8 (9 bit)
UART0 Transmit Buffer
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TXBUF : TXBUF field description
bits : 0 - 8 (9 bit)
UART0 Baud rate Generator Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SPBRG : SPBRG field description
bits : 0 - 15 (16 bit)
UART0 Interrupt Enable Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TXSE_IE : TXSE_IE field description
bits : 0 - 0 (1 bit)
TXBE_IE : TXBE_IE field description
bits : 1 - 1 (1 bit)
NEWUP_IE : NEWUP_IE field description
bits : 7 - 7 (1 bit)
RXBF_IE : RXBF_IE field description
bits : 8 - 8 (1 bit)
RXERR_IE : RXERR_IE field description
bits : 10 - 10 (1 bit)
RXTO_IE : RXTO_IE field description
bits : 11 - 11 (1 bit)
UART0 Interrupt Status Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TXSE : TXSE field description
bits : 0 - 0 (1 bit)
access : read-write
TXBE : TXBE field description
bits : 1 - 1 (1 bit)
access : read-only
NEWKF : NEWKF field description
bits : 7 - 7 (1 bit)
access : read-write
RXBF : RXBF field description
bits : 8 - 8 (1 bit)
access : read-write
RXTO : RXTO field description
bits : 11 - 11 (1 bit)
access : read-write
OERR : OERR field description
bits : 16 - 16 (1 bit)
access : read-write
FERR : FERR field description
bits : 17 - 17 (1 bit)
access : read-write
PERR : PERR field description
bits : 18 - 18 (1 bit)
access : read-write
UART0 Time-Out and Delay Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RXTO_LEN : RXTO_LEN field description
bits : 0 - 7 (8 bit)
TXDLY_LEN : TXDLY_LEN field description
bits : 8 - 15 (8 bit)
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