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CRC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x20 byte (0x0)
mem_usage : registers
protection :

Registers

DR

POLY

CR

LFSR

XOR


DR

CRC Data Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DR DR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DR

DR : DR field description
bits : 0 - 31 (32 bit)


POLY

CRC Polynominal Register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

POLY POLY read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 POLY

POLY : POLY field description
bits : 0 - 31 (32 bit)


CR

CRC Control Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CR CR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SEL XOR BUSY RES RFLTO RFLTIN PARA OPWD

SEL : SEL field description
bits : 0 - 1 (2 bit)
access : read-write

XOR : XOR field description
bits : 2 - 2 (1 bit)
access : read-write

BUSY : BUSY field description
bits : 3 - 3 (1 bit)
access : read-only

RES : RES field description
bits : 4 - 4 (1 bit)
access : read-only

RFLTO : RFLTO field description
bits : 5 - 5 (1 bit)
access : read-write

RFLTIN : RFLTIN field description
bits : 6 - 7 (2 bit)
access : read-write

PARA : PARA field description
bits : 8 - 8 (1 bit)
access : read-write

OPWD : OPWD field description
bits : 9 - 9 (1 bit)
access : read-write


LFSR

CRC Linear Feedback Shift Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LFSR LFSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LFSR

LFSR : LFSR field description
bits : 0 - 31 (32 bit)


XOR

CRC output XOR Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

XOR XOR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 XOR

XOR : XOR field description
bits : 0 - 31 (32 bit)



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