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ATIM

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x64 byte (0x0)
mem_usage : registers
protection :

Registers

CR1

ISR

EGR

CCMR1_Input

CCMR1_Output

CCMR2_Input

CCMR2_Output

CCER

CNT

PSC

ARR

RCR

CCR1

CCR2

CCR3

CR2

CCR4

BDTR

DCR

DMAR

BKCR

SMCR

DIER


CR1

ATIM Control Register1
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CR1 CR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CEN UDIS URS OPM DIR CMS ARPE CKD

CEN : CEN field description
bits : 0 - 0 (1 bit)

UDIS : UDIS field description
bits : 1 - 1 (1 bit)

URS : URS field description
bits : 2 - 2 (1 bit)

OPM : OPM field description
bits : 3 - 3 (1 bit)

DIR : DIR field description
bits : 4 - 4 (1 bit)

CMS : CMS field description
bits : 5 - 6 (2 bit)

ARPE : ARPE field description
bits : 7 - 7 (1 bit)

CKD : CKD field description
bits : 8 - 9 (2 bit)


ISR

ATIM Interrupt Status Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ISR ISR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UIF CC1IF CC2IF CC3IF CC4IF COMIF TIF BIF CC1OF CC2OF CC3OF CC4OF

UIF : UIF field description
bits : 0 - 0 (1 bit)

CC1IF : CC1IF field description
bits : 1 - 1 (1 bit)

CC2IF : CC2IF field description
bits : 2 - 2 (1 bit)

CC3IF : CC3IF field description
bits : 3 - 3 (1 bit)

CC4IF : CC4IF field description
bits : 4 - 4 (1 bit)

COMIF : COMIF field description
bits : 5 - 5 (1 bit)

TIF : TIF field description
bits : 6 - 6 (1 bit)

BIF : BIF field description
bits : 7 - 7 (1 bit)

CC1OF : CC1OF field description
bits : 9 - 9 (1 bit)

CC2OF : CC2OF field description
bits : 10 - 10 (1 bit)

CC3OF : CC3OF field description
bits : 11 - 11 (1 bit)

CC4OF : CC4OF field description
bits : 12 - 12 (1 bit)


EGR

ATIM Event Generation Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

EGR EGR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UG CC1G CC2G CC3G CC4G COMG TG BG

UG : UG field description
bits : 0 - 0 (1 bit)

CC1G : CC1G field description
bits : 1 - 1 (1 bit)

CC2G : CC2G field description
bits : 2 - 2 (1 bit)

CC3G : CC3G field description
bits : 3 - 3 (1 bit)

CC4G : CC4G field description
bits : 4 - 4 (1 bit)

COMG : COMG field description
bits : 5 - 5 (1 bit)

TG : TG field description
bits : 6 - 6 (1 bit)

BG : BG field description
bits : 7 - 7 (1 bit)


CCMR1_Input

ATIM Capture/Compare Mode Register1
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCMR1_Input CCMR1_Input read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CC1S IC1PSC IC1F CC2S IC2PSC IC2F

CC1S : CC1S field description
bits : 0 - 1 (2 bit)

IC1PSC : IC1PSC field description
bits : 2 - 3 (2 bit)

IC1F : IC1F field description
bits : 4 - 7 (4 bit)

CC2S : CC2S field description
bits : 8 - 9 (2 bit)

IC2PSC : IC2PSC field description
bits : 10 - 11 (2 bit)

IC2F : IC2F field description
bits : 12 - 15 (4 bit)


CCMR1_Output

ATIM Capture/Compare Mode Register1
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCMR1_Output CCMR1_Output read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CC1S OC1FE OC1PE OC1M OC1CE CC2S OC2FE OC2PE OC2M OC2CE

CC1S : CC1S field description
bits : 0 - 1 (2 bit)

OC1FE : OC1FE field description
bits : 2 - 2 (1 bit)

OC1PE : OC1PE field description
bits : 3 - 3 (1 bit)

OC1M : OC1M field description
bits : 4 - 6 (3 bit)

OC1CE : OC1CE field description
bits : 7 - 7 (1 bit)

CC2S : CC2S field description
bits : 8 - 9 (2 bit)

OC2FE : OC2FE field description
bits : 10 - 10 (1 bit)

OC2PE : OC2PE field description
bits : 11 - 11 (1 bit)

OC2M : OC2M field description
bits : 12 - 14 (3 bit)

OC2CE : OC2CE field description
bits : 15 - 15 (1 bit)


CCMR2_Input

ATIM Capture/Compare Mode Register2
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCMR2_Input CCMR2_Input read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CC3S IC3PSC IC3F CC4S IC4PSC IC4F

CC3S : CC3S field description
bits : 0 - 1 (2 bit)

IC3PSC : IC3PSC field description
bits : 2 - 3 (2 bit)

IC3F : IC3F field description
bits : 4 - 7 (4 bit)

CC4S : CC4S field description
bits : 8 - 9 (2 bit)

IC4PSC : IC4PSC field description
bits : 10 - 11 (2 bit)

IC4F : IC4F field description
bits : 12 - 15 (4 bit)


CCMR2_Output

ATIM Capture/Compare Mode Register2
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCMR2_Output CCMR2_Output read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CC3S OC3FE OC3PE OC3M OC3CE CC4S OC4FE OC4PE OC4M OC4CE

CC3S : CC3S field description
bits : 0 - 1 (2 bit)

OC3FE : OC3FE field description
bits : 2 - 2 (1 bit)

OC3PE : OC3PE field description
bits : 3 - 3 (1 bit)

OC3M : OC3M field description
bits : 4 - 6 (3 bit)

OC3CE : OC3CE field description
bits : 7 - 7 (1 bit)

CC4S : CC4S field description
bits : 8 - 9 (2 bit)

OC4FE : OC4FE field description
bits : 10 - 10 (1 bit)

OC4PE : OC4PE field description
bits : 11 - 11 (1 bit)

OC4M : OC4M field description
bits : 12 - 14 (3 bit)

OC4CE : OC4CE field description
bits : 15 - 15 (1 bit)


CCER

ATIM Capture/Compare Enable Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCER CCER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CC1E CC1P CC1NE CC1NP CC2E CC2P CC2NE CC2NP CC3E CC3P CC3NE CC3NP CC4E CC4P

CC1E : CC1E field description
bits : 0 - 0 (1 bit)

CC1P : CC1P field description
bits : 1 - 1 (1 bit)

CC1NE : CC1NE field description
bits : 2 - 2 (1 bit)

CC1NP : CC1NP field description
bits : 3 - 3 (1 bit)

CC2E : CC2E field description
bits : 4 - 4 (1 bit)

CC2P : CC2P field description
bits : 5 - 5 (1 bit)

CC2NE : CC2NE field description
bits : 6 - 6 (1 bit)

CC2NP : CC2NP field description
bits : 7 - 7 (1 bit)

CC3E : CC3E field description
bits : 8 - 8 (1 bit)

CC3P : CC3P field description
bits : 9 - 9 (1 bit)

CC3NE : CC3NE field description
bits : 10 - 10 (1 bit)

CC3NP : CC3NP field description
bits : 11 - 11 (1 bit)

CC4E : CC4E field description
bits : 12 - 12 (1 bit)

CC4P : CC4P field description
bits : 13 - 13 (1 bit)


CNT

ATIM Counter Register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CNT CNT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CNT

CNT : CNT field description
bits : 0 - 15 (16 bit)


PSC

ATIM Prescaler Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PSC PSC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PSC

PSC : PSC field description
bits : 0 - 15 (16 bit)


ARR

ATIM Auto-Reload Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ARR ARR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ARR

ARR : ARR field description
bits : 0 - 15 (16 bit)


RCR

ATIM Repetition Counter Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RCR RCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 REP

REP : REP field description
bits : 0 - 7 (8 bit)


CCR1

ATIM Capture/Compare Register1
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCR1 CCR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CCR1

CCR1 : CCR1 field description
bits : 0 - 15 (16 bit)


CCR2

ATIM Capture/Compare Register2
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCR2 CCR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CCR2

CCR2 : CCR2 field description
bits : 0 - 15 (16 bit)


CCR3

ATIM Capture/Compare Register3
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCR3 CCR3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CCR3

CCR3 : CCR3 field description
bits : 0 - 15 (16 bit)


CR2

ATIM Control Register2
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CR2 CR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CCPC CCUS CCDS MMS TI1S OIS1 OIS1N OIS2 OIS2N OIS3 OIS3N OIS4

CCPC : CCPC field description
bits : 0 - 0 (1 bit)

CCUS : CCUS field description
bits : 2 - 2 (1 bit)

CCDS : CCDS field description
bits : 3 - 3 (1 bit)

MMS : MMS field description
bits : 4 - 6 (3 bit)

TI1S : TI1S field description
bits : 7 - 7 (1 bit)

OIS1 : OIS1 field description
bits : 8 - 8 (1 bit)

OIS1N : OIS1N field description
bits : 9 - 9 (1 bit)

OIS2 : OIS2 field description
bits : 10 - 10 (1 bit)

OIS2N : OIS2N field description
bits : 11 - 11 (1 bit)

OIS3 : OIS3 field description
bits : 12 - 12 (1 bit)

OIS3N : OIS3N field description
bits : 13 - 13 (1 bit)

OIS4 : OIS4 field description
bits : 14 - 14 (1 bit)


CCR4

ATIM Capture/Compare Register4
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCR4 CCR4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CCR4

CCR4 : CCR4 field description
bits : 0 - 15 (16 bit)


BDTR

ATIM Break and Deadtime Register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BDTR BDTR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DTG LOCK OSSI OSSR BKE BKP AOE MOE

DTG : DTG field description
bits : 0 - 7 (8 bit)

LOCK : LOCK field description
bits : 8 - 9 (2 bit)

OSSI : OSSI field description
bits : 10 - 10 (1 bit)

OSSR : OSSR field description
bits : 11 - 11 (1 bit)

BKE : BKE field description
bits : 12 - 12 (1 bit)

BKP : BKP field description
bits : 13 - 13 (1 bit)

AOE : AOE field description
bits : 14 - 14 (1 bit)

MOE : MOE field description
bits : 15 - 15 (1 bit)


DCR

ATIM DMA Control Register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DCR DCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DBA DBL

DBA : DBA field description
bits : 0 - 4 (5 bit)

DBL : DBL field description
bits : 8 - 12 (5 bit)


DMAR

ATIM DMA Access Register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DMAR DMAR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DMAR

DMAR : DMAR field description
bits : 0 - 31 (32 bit)


BKCR

ATIM Break Control Register
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKCR BKCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP_BRKEN SVD_BRKEN HFDET_BRKEN BRKCOMB BRKF BRK1GATE BRK2GATE

COMP_BRKEN : COMP_BRKEN field description
bits : 0 - 0 (1 bit)

SVD_BRKEN : SVD_BRKEN field description
bits : 1 - 1 (1 bit)

HFDET_BRKEN : HFDET_BRKEN field description
bits : 2 - 2 (1 bit)

BRKCOMB : BRKCOMB field description
bits : 3 - 3 (1 bit)

BRKF : BRKF field description
bits : 4 - 7 (4 bit)

BRK1GATE : BRK1GATE field description
bits : 8 - 8 (1 bit)

BRK2GATE : BRK2GATE field description
bits : 9 - 9 (1 bit)


SMCR

ATIM Slave Mode Control Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SMCR SMCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SMS TS MSM ETF ETPS ECE ETP

SMS : SMS field description
bits : 0 - 2 (3 bit)

TS : TS field description
bits : 4 - 6 (3 bit)

MSM : MSM field description
bits : 7 - 7 (1 bit)

ETF : ETF field description
bits : 8 - 11 (4 bit)

ETPS : ETPS field description
bits : 12 - 13 (2 bit)

ECE : ECE field description
bits : 14 - 14 (1 bit)

ETP : ETP field description
bits : 15 - 15 (1 bit)


DIER

ATIM DMA and Interrupt Enable Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIER DIER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UIE CC1IE CC2IE CC3IE CC4IE COMIE TIE BIE UDE CC1DE CC2DE CC3DE CC4DE COMDE TDE CC1BURSTEN CC2BURSTEN CC3BURSTEN CC4BURSTEN

UIE : UIE field description
bits : 0 - 0 (1 bit)

CC1IE : CC1IE field description
bits : 1 - 1 (1 bit)

CC2IE : CC2IE field description
bits : 2 - 2 (1 bit)

CC3IE : CC3IE field description
bits : 3 - 3 (1 bit)

CC4IE : CC4IE field description
bits : 4 - 4 (1 bit)

COMIE : COMIE field description
bits : 5 - 5 (1 bit)

TIE : TIE field description
bits : 6 - 6 (1 bit)

BIE : BIE field description
bits : 7 - 7 (1 bit)

UDE : UDE field description
bits : 8 - 8 (1 bit)

CC1DE : CC1DE field description
bits : 9 - 9 (1 bit)

CC2DE : CC2DE field description
bits : 10 - 10 (1 bit)

CC3DE : CC3DE field description
bits : 11 - 11 (1 bit)

CC4DE : CC4DE field description
bits : 12 - 12 (1 bit)

COMDE : COMDE field description
bits : 13 - 13 (1 bit)

TDE : TDE field description
bits : 14 - 14 (1 bit)

CC1BURSTEN : CC1BURSTEN field description
bits : 16 - 16 (1 bit)

CC2BURSTEN : CC2BURSTEN field description
bits : 17 - 17 (1 bit)

CC3BURSTEN : CC3BURSTEN field description
bits : 18 - 18 (1 bit)

CC4BURSTEN : CC4BURSTEN field description
bits : 19 - 19 (1 bit)



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