\n
address_offset : 0x0 Bytes (0x0)
size : 0x30 byte (0x0)
mem_usage : registers
protection :
BSTIM Control Register1
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CEN : CEN field description
bits : 0 - 0 (1 bit)
UDIS : UDIS field description
bits : 1 - 1 (1 bit)
URS : URS field description
bits : 2 - 2 (1 bit)
OPM : OPM field description
bits : 3 - 3 (1 bit)
ARPE : ARPE field description
bits : 7 - 7 (1 bit)
BSTIM Interrupt Status Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UIF : UIF field description
bits : 0 - 0 (1 bit)
BSTIM Event Generation Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
UG : UG field description
bits : 0 - 0 (1 bit)
BSTIM Counter Register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CNT : CNT field description
bits : 0 - 31 (32 bit)
BSTIM Prescaler Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PSC : PSC field description
bits : 0 - 31 (32 bit)
BSTIM Auto-Reload Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ARR : ARR field description
bits : 0 - 31 (32 bit)
BSTIM Control Register2
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MMS : MMS field description
bits : 4 - 6 (3 bit)
BSTIM Interrupt Enable Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UIE : UIE field description
bits : 0 - 0 (1 bit)
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