\n
address_offset : 0x0 Bytes (0x0)
size : 0x58 byte (0x0)
mem_usage : registers
protection :
LCD Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN : EN field description
bits : 0 - 0 (1 bit)
LMUX : LMUX field description
bits : 1 - 2 (2 bit)
WFT : WFT field description
bits : 3 - 3 (1 bit)
ANTIPOLAR : ANTIPOLAR field description
bits : 4 - 4 (1 bit)
BIASMD : BIASMD field description
bits : 5 - 5 (1 bit)
BIAS : BIAS field description
bits : 8 - 11 (4 bit)
FLICK : FLICK field description
bits : 14 - 14 (1 bit)
ENMODE : ENMODE field description
bits : 15 - 15 (1 bit)
IC_CTRL : IC_CTRL field description
bits : 16 - 17 (2 bit)
LCD Interrupt Enable Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DOFFIE : DOFFIE field description
bits : 0 - 0 (1 bit)
DONIE : DONIE field description
bits : 1 - 1 (1 bit)
LCD Interrupt Status Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DOFFIF : DOFFIF field description
bits : 0 - 0 (1 bit)
DONIF : DONIF field description
bits : 1 - 1 (1 bit)
LCD data buffer registers 0
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DSDA : DSDA field description
bits : 0 - 31 (32 bit)
LCD data buffer registers 1
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DSDA : DSDA field description
bits : 0 - 31 (32 bit)
LCD data buffer registers 2
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DSDA : DSDA field description
bits : 0 - 31 (32 bit)
LCD data buffer registers 3
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DSDA : DSDA field description
bits : 0 - 31 (32 bit)
LCD data buffer registers 4
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DSDA : DSDA field description
bits : 0 - 31 (32 bit)
LCD data buffer registers 5
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DSDA : DSDA field description
bits : 0 - 31 (32 bit)
LCD data buffer registers 6
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DSDA : DSDA field description
bits : 0 - 31 (32 bit)
LCD test Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TESTEN : TESTEN field description
bits : 0 - 0 (1 bit)
LCCTRL : LCCTRL field description
bits : 7 - 7 (1 bit)
LCD data buffer registers 7
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DSDA : DSDA field description
bits : 0 - 31 (32 bit)
LCD COM Enable Register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COMEN0 : COMEN0 field description
bits : 0 - 0 (1 bit)
COMEN1 : COMEN1 field description
bits : 1 - 1 (1 bit)
COMEN2 : COMEN2 field description
bits : 2 - 2 (1 bit)
COMEN3 : COMEN3 field description
bits : 3 - 3 (1 bit)
LCD SEG Enable Register0
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEGEN0 : SEGEN0 field description
bits : 0 - 0 (1 bit)
SEGEN1 : SEGEN1 field description
bits : 1 - 1 (1 bit)
SEGEN2 : SEGEN2 field description
bits : 2 - 2 (1 bit)
SEGEN3 : SEGEN3 field description
bits : 3 - 3 (1 bit)
SEGEN4 : SEGEN4 field description
bits : 4 - 4 (1 bit)
SEGEN5 : SEGEN5 field description
bits : 5 - 5 (1 bit)
SEGEN6 : SEGEN6 field description
bits : 6 - 6 (1 bit)
SEGEN7 : SEGEN7 field description
bits : 7 - 7 (1 bit)
SEGEN8 : SEGEN8 field description
bits : 8 - 8 (1 bit)
SEGEN9 : SEGEN9 field description
bits : 9 - 9 (1 bit)
SEGEN10 : SEGEN10 field description
bits : 10 - 10 (1 bit)
SEGEN11 : SEGEN11 field description
bits : 11 - 11 (1 bit)
SEGEN12 : SEGEN12 field description
bits : 12 - 12 (1 bit)
SEGEN13 : SEGEN13 field description
bits : 13 - 13 (1 bit)
SEGEN14 : SEGEN14 field description
bits : 14 - 14 (1 bit)
SEGEN15 : SEGEN15 field description
bits : 15 - 15 (1 bit)
SEGEN16 : SEGEN16 field description
bits : 16 - 16 (1 bit)
SEGEN17 : SEGEN17 field description
bits : 17 - 17 (1 bit)
SEGEN18 : SEGEN18 field description
bits : 18 - 18 (1 bit)
SEGEN19 : SEGEN19 field description
bits : 19 - 19 (1 bit)
SEGEN20 : SEGEN20 field description
bits : 20 - 20 (1 bit)
SEGEN21 : SEGEN21 field description
bits : 21 - 21 (1 bit)
SEGEN22 : SEGEN22 field description
bits : 22 - 22 (1 bit)
SEGEN23 : SEGEN23 field description
bits : 23 - 23 (1 bit)
SEGEN24 : SEGEN24 field description
bits : 24 - 24 (1 bit)
SEGEN25 : SEGEN25 field description
bits : 25 - 25 (1 bit)
SEGEN26 : SEGEN26 field description
bits : 26 - 26 (1 bit)
SEGEN27 : SEGEN27 field description
bits : 27 - 27 (1 bit)
SEG28_COM4_EN : SEG28_COM4_EN field description
bits : 28 - 28 (1 bit)
SEG29_COM5_EN : SEG29_COM5_EN field description
bits : 29 - 29 (1 bit)
SEG30_COM6_EN : SEG30_COM6_EN field description
bits : 30 - 30 (1 bit)
SEG31_COM7_EN : SEG31_COM7_EN field description
bits : 31 - 31 (1 bit)
LCD Frequency Control Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DF : DF field description
bits : 0 - 7 (8 bit)
LCD Flick Time Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TON : TON field description
bits : 0 - 7 (8 bit)
TOFF : TOFF field description
bits : 8 - 15 (8 bit)
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