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LCD

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x58 byte (0x0)
mem_usage : registers
protection :

Registers

CR

IER

ISR

DATA0

DATA1

DATA2

DATA3

DATA4

DATA5

DATA6

TEST

DATA7

COMEN

SEGEN0

FCR

FLKT


CR

LCD Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CR CR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EN LMUX WFT ANTIPOLAR BIASMD BIAS FLICK ENMODE IC_CTRL

EN : EN field description
bits : 0 - 0 (1 bit)

LMUX : LMUX field description
bits : 1 - 2 (2 bit)

WFT : WFT field description
bits : 3 - 3 (1 bit)

ANTIPOLAR : ANTIPOLAR field description
bits : 4 - 4 (1 bit)

BIASMD : BIASMD field description
bits : 5 - 5 (1 bit)

BIAS : BIAS field description
bits : 8 - 11 (4 bit)

FLICK : FLICK field description
bits : 14 - 14 (1 bit)

ENMODE : ENMODE field description
bits : 15 - 15 (1 bit)

IC_CTRL : IC_CTRL field description
bits : 16 - 17 (2 bit)


IER

LCD Interrupt Enable Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IER IER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DOFFIE DONIE

DOFFIE : DOFFIE field description
bits : 0 - 0 (1 bit)

DONIE : DONIE field description
bits : 1 - 1 (1 bit)


ISR

LCD Interrupt Status Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ISR ISR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DOFFIF DONIF

DOFFIF : DOFFIF field description
bits : 0 - 0 (1 bit)

DONIF : DONIF field description
bits : 1 - 1 (1 bit)


DATA0

LCD data buffer registers 0
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA0 DATA0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DSDA

DSDA : DSDA field description
bits : 0 - 31 (32 bit)


DATA1

LCD data buffer registers 1
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA1 DATA1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DSDA

DSDA : DSDA field description
bits : 0 - 31 (32 bit)


DATA2

LCD data buffer registers 2
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA2 DATA2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DSDA

DSDA : DSDA field description
bits : 0 - 31 (32 bit)


DATA3

LCD data buffer registers 3
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA3 DATA3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DSDA

DSDA : DSDA field description
bits : 0 - 31 (32 bit)


DATA4

LCD data buffer registers 4
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA4 DATA4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DSDA

DSDA : DSDA field description
bits : 0 - 31 (32 bit)


DATA5

LCD data buffer registers 5
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA5 DATA5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DSDA

DSDA : DSDA field description
bits : 0 - 31 (32 bit)


DATA6

LCD data buffer registers 6
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA6 DATA6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DSDA

DSDA : DSDA field description
bits : 0 - 31 (32 bit)


TEST

LCD test Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TEST TEST read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TESTEN LCCTRL

TESTEN : TESTEN field description
bits : 0 - 0 (1 bit)

LCCTRL : LCCTRL field description
bits : 7 - 7 (1 bit)


DATA7

LCD data buffer registers 7
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA7 DATA7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DSDA

DSDA : DSDA field description
bits : 0 - 31 (32 bit)


COMEN

LCD COM Enable Register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

COMEN COMEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMEN0 COMEN1 COMEN2 COMEN3

COMEN0 : COMEN0 field description
bits : 0 - 0 (1 bit)

COMEN1 : COMEN1 field description
bits : 1 - 1 (1 bit)

COMEN2 : COMEN2 field description
bits : 2 - 2 (1 bit)

COMEN3 : COMEN3 field description
bits : 3 - 3 (1 bit)


SEGEN0

LCD SEG Enable Register0
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SEGEN0 SEGEN0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SEGEN0 SEGEN1 SEGEN2 SEGEN3 SEGEN4 SEGEN5 SEGEN6 SEGEN7 SEGEN8 SEGEN9 SEGEN10 SEGEN11 SEGEN12 SEGEN13 SEGEN14 SEGEN15 SEGEN16 SEGEN17 SEGEN18 SEGEN19 SEGEN20 SEGEN21 SEGEN22 SEGEN23 SEGEN24 SEGEN25 SEGEN26 SEGEN27 SEG28_COM4_EN SEG29_COM5_EN SEG30_COM6_EN SEG31_COM7_EN

SEGEN0 : SEGEN0 field description
bits : 0 - 0 (1 bit)

SEGEN1 : SEGEN1 field description
bits : 1 - 1 (1 bit)

SEGEN2 : SEGEN2 field description
bits : 2 - 2 (1 bit)

SEGEN3 : SEGEN3 field description
bits : 3 - 3 (1 bit)

SEGEN4 : SEGEN4 field description
bits : 4 - 4 (1 bit)

SEGEN5 : SEGEN5 field description
bits : 5 - 5 (1 bit)

SEGEN6 : SEGEN6 field description
bits : 6 - 6 (1 bit)

SEGEN7 : SEGEN7 field description
bits : 7 - 7 (1 bit)

SEGEN8 : SEGEN8 field description
bits : 8 - 8 (1 bit)

SEGEN9 : SEGEN9 field description
bits : 9 - 9 (1 bit)

SEGEN10 : SEGEN10 field description
bits : 10 - 10 (1 bit)

SEGEN11 : SEGEN11 field description
bits : 11 - 11 (1 bit)

SEGEN12 : SEGEN12 field description
bits : 12 - 12 (1 bit)

SEGEN13 : SEGEN13 field description
bits : 13 - 13 (1 bit)

SEGEN14 : SEGEN14 field description
bits : 14 - 14 (1 bit)

SEGEN15 : SEGEN15 field description
bits : 15 - 15 (1 bit)

SEGEN16 : SEGEN16 field description
bits : 16 - 16 (1 bit)

SEGEN17 : SEGEN17 field description
bits : 17 - 17 (1 bit)

SEGEN18 : SEGEN18 field description
bits : 18 - 18 (1 bit)

SEGEN19 : SEGEN19 field description
bits : 19 - 19 (1 bit)

SEGEN20 : SEGEN20 field description
bits : 20 - 20 (1 bit)

SEGEN21 : SEGEN21 field description
bits : 21 - 21 (1 bit)

SEGEN22 : SEGEN22 field description
bits : 22 - 22 (1 bit)

SEGEN23 : SEGEN23 field description
bits : 23 - 23 (1 bit)

SEGEN24 : SEGEN24 field description
bits : 24 - 24 (1 bit)

SEGEN25 : SEGEN25 field description
bits : 25 - 25 (1 bit)

SEGEN26 : SEGEN26 field description
bits : 26 - 26 (1 bit)

SEGEN27 : SEGEN27 field description
bits : 27 - 27 (1 bit)

SEG28_COM4_EN : SEG28_COM4_EN field description
bits : 28 - 28 (1 bit)

SEG29_COM5_EN : SEG29_COM5_EN field description
bits : 29 - 29 (1 bit)

SEG30_COM6_EN : SEG30_COM6_EN field description
bits : 30 - 30 (1 bit)

SEG31_COM7_EN : SEG31_COM7_EN field description
bits : 31 - 31 (1 bit)


FCR

LCD Frequency Control Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCR FCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DF

DF : DF field description
bits : 0 - 7 (8 bit)


FLKT

LCD Flick Time Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLKT FLKT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TON TOFF

TON : TON field description
bits : 0 - 7 (8 bit)

TOFF : TOFF field description
bits : 8 - 15 (8 bit)



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