\n
address_offset : 0x0 Bytes (0x0)
size : 0x24 byte (0x0)
mem_usage : registers
protection :
ADC Interrupt and Status Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EOC : EOC field description
bits : 0 - 0 (1 bit)
access : read-write
EOS : EOS field description
bits : 1 - 1 (1 bit)
access : read-write
OVR : OVR field description
bits : 2 - 2 (1 bit)
access : read-write
BUSY : BUSY field description
bits : 3 - 3 (1 bit)
access : read-only
AWD_UL : AWD_UL field description
bits : 5 - 5 (1 bit)
access : read-write
AWD_AH : AWD_AH field description
bits : 6 - 6 (1 bit)
access : read-write
ADC Sampling Time Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SMTS1 : SMTS1 field description
bits : 0 - 3 (4 bit)
SMTS2 : SMTS2 field description
bits : 4 - 7 (4 bit)
CHCG : CHCG field description
bits : 8 - 11 (4 bit)
ADC Channel Enable Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ECH0 : ECH0 field description
bits : 0 - 0 (1 bit)
ECH1 : ECH1 field description
bits : 1 - 1 (1 bit)
ECH2 : ECH2 field description
bits : 2 - 2 (1 bit)
ECH3 : ECH3 field description
bits : 3 - 3 (1 bit)
ECH4 : ECH4 field description
bits : 4 - 4 (1 bit)
ECH5 : ECH5 field description
bits : 5 - 5 (1 bit)
ECH6 : ECH6 field description
bits : 6 - 6 (1 bit)
ECH7 : ECH7 field description
bits : 7 - 7 (1 bit)
ECH8 : ECH8 field description
bits : 8 - 8 (1 bit)
ECH9 : ECH9 field description
bits : 9 - 9 (1 bit)
ECH10 : ECH10 field description
bits : 10 - 10 (1 bit)
ECH11 : ECH11 field description
bits : 11 - 11 (1 bit)
TSCH : TSCH field description
bits : 16 - 16 (1 bit)
REFCH : REFCH field description
bits : 17 - 17 (1 bit)
OPA1CH : OPA1CH field description
bits : 18 - 18 (1 bit)
OPA2CH : OPA2CH field description
bits : 19 - 19 (1 bit)
ADC Data Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DATA : DATA field description
bits : 0 - 15 (16 bit)
ADC Sampling Register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SAMPT_S : SAMPT_S field description
bits : 0 - 0 (1 bit)
ADC analog watchdog Threshold Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AWD_LT : AWD_LT field description
bits : 0 - 11 (12 bit)
AWD_HT : AWD_HT field description
bits : 16 - 27 (12 bit)
ADC Interrupt Enable Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EOCIE : EOCIE field description
bits : 0 - 0 (1 bit)
EOSIE : EOSIE field description
bits : 1 - 1 (1 bit)
OVRIE : OVRIE field description
bits : 2 - 2 (1 bit)
AWD_ULIE : AWD_ULIE field description
bits : 5 - 5 (1 bit)
AWD_AHIE : AWD_AHIE field description
bits : 6 - 6 (1 bit)
ADC Control Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ADEN : ADEN field description
bits : 0 - 0 (1 bit)
START : START field description
bits : 1 - 1 (1 bit)
EXSYNC : EXSYNC field description
bits : 8 - 8 (1 bit)
EXSAMP : EXSAMP field description
bits : 9 - 9 (1 bit)
ADC Config Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DMAEN : DMAEN field description
bits : 0 - 0 (1 bit)
DMACFG : DMACFG field description
bits : 1 - 1 (1 bit)
SCANDIR : SCANDIR field description
bits : 2 - 2 (1 bit)
EXTS : EXTS field description
bits : 4 - 7 (4 bit)
OVRM : OVRM field description
bits : 8 - 8 (1 bit)
CONT : CONT field description
bits : 9 - 9 (1 bit)
WAIT : WAIT field description
bits : 10 - 10 (1 bit)
SEMI : SEMI field description
bits : 11 - 11 (1 bit)
TRGCFG : TRGCFG field description
bits : 12 - 13 (2 bit)
IOTRFEN : IOTRFEN field description
bits : 14 - 14 (1 bit)
OVSEN : OVSEN field description
bits : 16 - 16 (1 bit)
OVSR : OVSR field description
bits : 17 - 19 (3 bit)
OVSS : OVSS field description
bits : 20 - 23 (4 bit)
AWDEN : AWDEN field description
bits : 24 - 24 (1 bit)
AWDSC : AWDSC field description
bits : 25 - 25 (1 bit)
AWDCH : AWDCH field description
bits : 26 - 29 (4 bit)
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