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CTC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :

Registers

CTL0

CTL1

STAT

INTC


CTL0

Control Register 0
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTL0 CTL0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CKOKIE CKWARNIE ERRIE EREFIE CNTEN AUTOTRIM SWREFPUL TRIMVALUE

CKOKIE : Clock trim OK (CKOKIF) interrupt enable
bits : 0 - 0 (1 bit)

CKWARNIE : Clock trim warning (CKWARNIF) interrupt enable
bits : 1 - 1 (1 bit)

ERRIE : Error (ERRIF) interrupt enable
bits : 2 - 2 (1 bit)

EREFIE : EREFIF interrupt enable
bits : 3 - 3 (1 bit)

CNTEN : CTC counter enable
bits : 5 - 5 (1 bit)

AUTOTRIM : Hardware automatically trim mode
bits : 6 - 6 (1 bit)

SWREFPUL : Software reference source sync pulse
bits : 7 - 7 (1 bit)

TRIMVALUE : IRC48M trim value
bits : 8 - 13 (6 bit)


CTL1

Control Register 1
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTL1 CTL1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RLVALUE CKLIM REFPSC REFSEL REFPOL

RLVALUE : CTC counter reload value
bits : 0 - 15 (16 bit)

CKLIM : Clock trim base limit value
bits : 16 - 23 (8 bit)

REFPSC : Reference signal source prescaler
bits : 24 - 26 (3 bit)

REFSEL : Reference signal source selection
bits : 28 - 29 (2 bit)

REFPOL : Reference signal source polarity
bits : 31 - 31 (1 bit)


STAT

Status Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

STAT STAT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CKOKIF CKWARNIF ERRIF EREFIF CKERR REFMISS TRIMERR REFDIR REFCAP

CKOKIF : Clock trim OK interrupt flag
bits : 0 - 0 (1 bit)

CKWARNIF : Clock trim warning interrupt flag
bits : 1 - 1 (1 bit)

ERRIF : Error interrupt flag
bits : 2 - 2 (1 bit)

EREFIF : Expect reference interrupt flag
bits : 3 - 3 (1 bit)

CKERR : Clock trim error bit
bits : 8 - 8 (1 bit)

REFMISS : Reference sync pulse miss
bits : 9 - 9 (1 bit)

TRIMERR : Trim value error bit
bits : 10 - 10 (1 bit)

REFDIR : CTC trim counter direction when reference sync pulse
bits : 15 - 15 (1 bit)

REFCAP : CTC counter capture when reference sync pulse
bits : 16 - 31 (16 bit)


INTC

Interrupt clear Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

INTC INTC write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CKOKIC CKWARNIC ERRIC EREFIC

CKOKIC : CKOKIF interrupt clear bit
bits : 0 - 0 (1 bit)

CKWARNIC : CKWARNIF interrupt clear bit
bits : 1 - 1 (1 bit)

ERRIC : ERRIF interrupt clear bit
bits : 2 - 2 (1 bit)

EREFIC : EREFIF interrupt clear bit
bits : 3 - 3 (1 bit)



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