\n
address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :
Wait state register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WSCNT : WSCNT
bits : 0 - 2 (3 bit)
access : read-write
Flash control register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PG : Programming
bits : 0 - 0 (1 bit)
PER : Main flash page erase command bit
bits : 1 - 1 (1 bit)
MER : Main flash mass erase command bit
bits : 2 - 2 (1 bit)
OBPG : Option byte programming
bits : 4 - 4 (1 bit)
OBER : Option byte erase
bits : 5 - 5 (1 bit)
START : Start
bits : 6 - 6 (1 bit)
LK : Lock
bits : 7 - 7 (1 bit)
OBWEN : Option bytes write enable
bits : 9 - 9 (1 bit)
ERRIE : Error interrupt enable
bits : 10 - 10 (1 bit)
ENDIE : End of operation interrupt enable
bits : 12 - 12 (1 bit)
OBRLD : Option byte reload bit
bits : 13 - 13 (1 bit)
Flash Product ID register
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PID : Product reserved ID code register1
bits : 0 - 31 (32 bit)
Flash address register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ADDR : Flash command address
bits : 0 - 31 (32 bit)
Option byte status register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
OBERR : Option byte error
bits : 0 - 0 (1 bit)
PLEVEL : PLEVEL
bits : 1 - 2 (2 bit)
OB_USER : OB_USER
bits : 8 - 15 (8 bit)
OB_DATA : OB_DATA
bits : 16 - 31 (16 bit)
Write protection register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
OB_WP : Write protect
bits : 0 - 15 (16 bit)
Flash unlock key register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
KEY : FMC_CTL unlock register
bits : 0 - 31 (32 bit)
Flash option byte unlock key register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
OBKEY : Option byte key
bits : 0 - 31 (32 bit)
Flash status register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BUSY : Busy
bits : 0 - 0 (1 bit)
access : read-only
PGERR : Program error flag bit
bits : 2 - 2 (1 bit)
access : read-write
WPERR : Erase/Program protection error flag bit
bits : 4 - 4 (1 bit)
access : read-write
ENDF : End of operation flag bit
bits : 5 - 5 (1 bit)
access : read-write
Flash wait state control register
address_offset : 0xFC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
WSEN : FMC wait state enable register
bits : 0 - 0 (1 bit)
BPEN : FMC bit program enable register
bits : 1 - 1 (1 bit)
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