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SYSCFG

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x2C byte (0x0)
mem_usage : registers
protection :

Registers

CFG0

EXTISS2

EXTISS3

CFG2

CPSCTL

EXTISS0

EXTISS1


CFG0

System configuration register 0
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFG0 CFG0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BOOT_MODE ADC_DMA_RMP USART0_TX_DMA_RMP USART0_RX_DMA_RMP TIMER15_DMA_RMP TIMER16_DMA_RMP PB9_HCCE

BOOT_MODE : Boot mode
bits : 0 - 1 (2 bit)
access : read-only

ADC_DMA_RMP : ADC DMA request remapping enable
bits : 8 - 8 (1 bit)

USART0_TX_DMA_RMP : USART0_TX DMA request remapping enable
bits : 9 - 9 (1 bit)

USART0_RX_DMA_RMP : USART0_RX DMA request remapping enable
bits : 10 - 10 (1 bit)

TIMER15_DMA_RMP : Timer 15 DMA request remapping enable
bits : 11 - 11 (1 bit)

TIMER16_DMA_RMP : Timer 16 DMA request remapping enable
bits : 12 - 12 (1 bit)

PB9_HCCE : PB9 pin high current capability enable
bits : 19 - 19 (1 bit)


EXTISS2

EXTI sources selection register 2
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTISS2 EXTISS2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTI8_SS EXTI9_SS EXTI10_SS EXTI11_SS

EXTI8_SS : EXTI 8 sources selection
bits : 0 - 3 (4 bit)

EXTI9_SS : EXTI 9 sources selection
bits : 4 - 7 (4 bit)

EXTI10_SS : EXTI 10 sources selection
bits : 8 - 11 (4 bit)

EXTI11_SS : EXTI 11 sources selection
bits : 12 - 15 (4 bit)


EXTISS3

EXTI sources selection register 3
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTISS3 EXTISS3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTI12_SS EXTI13_SS EXTI14_SS EXTI15_SS

EXTI12_SS : EXTI 12 sources selection
bits : 0 - 3 (4 bit)

EXTI13_SS : EXTI 13 sources selection
bits : 4 - 7 (4 bit)

EXTI14_SS : EXTI 14 sources selection
bits : 8 - 11 (4 bit)

EXTI15_SS : EXTI 15 sources selection
bits : 12 - 15 (4 bit)


CFG2

System configuration register 2
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFG2 CFG2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LOCKUP_LOCK SRAM_PARITY_ERROR_LOCK LVD_LOCK SRAM_PCEF

LOCKUP_LOCK : Cortex-M4 LOCKUP output lock
bits : 0 - 0 (1 bit)

SRAM_PARITY_ERROR_LOCK : SRAM parity check error lock
bits : 1 - 1 (1 bit)

LVD_LOCK : LVD lock
bits : 2 - 2 (1 bit)

SRAM_PCEF : SRAM parity check error flag
bits : 8 - 8 (1 bit)


CPSCTL

I/O compensation control register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CPSCTL CPSCTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CPS_EN CPS_RDY

CPS_EN : I/O compensation cell enable
bits : 0 - 0 (1 bit)

CPS_RDY : I/O compensation cell is ready
bits : 8 - 8 (1 bit)


EXTISS0

EXTI sources selection register 0
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTISS0 EXTISS0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTI0_SS EXTI1_SS EXTI2_SS EXTI3_SS

EXTI0_SS : EXTI 0 sources selection
bits : 0 - 3 (4 bit)

EXTI1_SS : EXTI 1 sources selection
bits : 4 - 7 (4 bit)

EXTI2_SS : EXTI 2 sources selection
bits : 8 - 11 (4 bit)

EXTI3_SS : EXTI 3 sources selection
bits : 12 - 15 (4 bit)


EXTISS1

EXTI sources selection register 1
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTISS1 EXTISS1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTI4_SS EXTI5_SS EXTI6_SS EXTI7_SS

EXTI4_SS : EXTI 4 sources selection
bits : 0 - 3 (4 bit)

EXTI5_SS : EXTI 5 sources selection
bits : 4 - 7 (4 bit)

EXTI6_SS : EXTI 6 sources selection
bits : 8 - 11 (4 bit)

EXTI7_SS : EXTI 7 sources selection
bits : 12 - 15 (4 bit)



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