\n
address_offset : 0x0 Bytes (0x0)
    size : 0x400 byte (0x0)
    mem_usage : registers
    protection : 
    
    device configuration register (DCFG)
    address_offset : 0x0 Bytes (0x0)
    size : 32 bit
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
DS : Device speed
    bits : 0 - 1 (2 bit)
NZLSOH : Non-zero-length status OUT handshake
    bits : 2 - 2 (1 bit)
DAR : Device address
    bits : 4 - 10 (7 bit)
EOPFT : end of periodic frame time
    bits : 11 - 12 (2 bit)
    device IN endpoint common interrupt mask register (DIEPINTEN)
    address_offset : 0x10 Bytes (0x0)
    size : 32 bit
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
TFEN : Transfer finished interrupt enable
    bits : 0 - 0 (1 bit)
EPDISEN : Endpoint disabled interrupt enable
    bits : 1 - 1 (1 bit)
CITOEN : Control IN timeout condition interrupt enable (Non-isochronous endpoints)
    bits : 3 - 3 (1 bit)
EPTXFUDEN : Endpoint Tx FIFO underrun interrupt enable bit
    bits : 4 - 4 (1 bit)
IEPNEEN : IN endpoint NAK effective interrupt enable
    bits : 6 - 6 (1 bit)
    device IN endpoint 0 control register (DIEP0CTL)
    address_offset : 0x100 Bytes (0x0)
    size : 32 bit
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
MPL : Maximum packet length
    bits : 0 - 1 (2 bit)
    access : read-write
EPACT : endpoint active
    bits : 15 - 15 (1 bit)
    access : read-only
NAKS : NAK status
    bits : 17 - 17 (1 bit)
    access : read-only
EPTYPE : Endpoint type
    bits : 18 - 19 (2 bit)
    access : read-only
STALL : STALL handshake
    bits : 21 - 21 (1 bit)
    access : read-write
TXFNUM : TxFIFO number
    bits : 22 - 25 (4 bit)
    access : read-write
CNAK : Clear NAK
    bits : 26 - 26 (1 bit)
    access : write-only
SNAK : Set NAK
    bits : 27 - 27 (1 bit)
    access : write-only
EPD : Endpoint disable
    bits : 30 - 30 (1 bit)
    access : read-write
EPEN : Endpoint enable
    bits : 31 - 31 (1 bit)
    access : read-write
    device endpoint-0 interrupt register
    address_offset : 0x108 Bytes (0x0)
    size : 32 bit
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
TF : Transfer finished
    bits : 0 - 0 (1 bit)
    access : read-write
EPDIS : Endpoint finished
    bits : 1 - 1 (1 bit)
    access : read-write
CITO : Control in timeout interrupt
    bits : 3 - 3 (1 bit)
    access : read-write
EPTXFUD : Endpoint Tx FIFO underrun
    bits : 4 - 4 (1 bit)
    access : read-write
IEPNE : IN endpoint NAK effective
    bits : 6 - 6 (1 bit)
    access : read-write
TXFE : Transmit FIFO empty
    bits : 7 - 7 (1 bit)
    access : read-only
    device IN endpoint-0 transfer length register
    address_offset : 0x110 Bytes (0x0)
    size : 32 bit
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
TLEN : Transfer length
    bits : 0 - 6 (7 bit)
PCNT : Packet count
    bits : 19 - 20 (2 bit)
    device IN endpoint 0 transmit FIFO status register
    address_offset : 0x118 Bytes (0x0)
    size : 32 bit
    access : read-only
    reset_value : 0x0
    reset_Mask : 0x0
    
IEPTFS : IN endpoint TxFIFO space remaining
    bits : 0 - 15 (16 bit)
    device in endpoint-1 control register
    address_offset : 0x120 Bytes (0x0)
    size : 32 bit
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
MPL : maximum packet length
    bits : 0 - 10 (11 bit)
    access : read-write
EPACT : Endpoint active
    bits : 15 - 15 (1 bit)
    access : read-write
EOFRM_DPID : EOFRM/DPID
    bits : 16 - 16 (1 bit)
    access : read-only
NAKS : NAK status
    bits : 17 - 17 (1 bit)
    access : read-only
EPTYPE : Endpoint type
    bits : 18 - 19 (2 bit)
    access : read-write
STALL : STALL handshake
    bits : 21 - 21 (1 bit)
    access : read-write
TXFNUM : Tx FIFO number
    bits : 22 - 25 (4 bit)
    access : read-write
CNAK : Clear NAK
    bits : 26 - 26 (1 bit)
    access : write-only
SNAK : Set NAK
    bits : 27 - 27 (1 bit)
    access : write-only
SD0PID_SEVENFRM : SD0PID/SEVNFRM
    bits : 28 - 28 (1 bit)
    access : write-only
SD1PID_SODDFRM : Set DATA1 PID/Set odd frame
    bits : 29 - 29 (1 bit)
    access : write-only
EPD : Endpoint disable
    bits : 30 - 30 (1 bit)
    access : read-write
EPEN : Endpoint enable
    bits : 31 - 31 (1 bit)
    access : read-write
    device endpoint-1 interrupt register
    address_offset : 0x128 Bytes (0x0)
    size : 32 bit
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
TF : Transfer finished
    bits : 0 - 0 (1 bit)
    access : read-write
EPDIS : Endpoint finished
    bits : 1 - 1 (1 bit)
    access : read-write
CITO : Control in timeout interrupt
    bits : 3 - 3 (1 bit)
    access : read-write
EPTXFUD : Endpoint Tx FIFO underrun
    bits : 4 - 4 (1 bit)
    access : read-write
IEPNE : IN endpoint NAK effective
    bits : 6 - 6 (1 bit)
    access : read-write
TXFE : Transmit FIFO empty
    bits : 7 - 7 (1 bit)
    access : read-only
    device IN endpoint-1 transfer length register
    address_offset : 0x130 Bytes (0x0)
    size : 32 bit
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
TLEN : Transfer length
    bits : 0 - 18 (19 bit)
PCNT : Packet count
    bits : 19 - 28 (10 bit)
MCPF : Multi packet count per frame
    bits : 29 - 30 (2 bit)
    device IN endpoint 1 transmit FIFO status register
    address_offset : 0x138 Bytes (0x0)
    size : 32 bit
    access : read-only
    reset_value : 0x0
    reset_Mask : 0x0
    
IEPTFS : IN endpoint TxFIFO space remaining
    bits : 0 - 15 (16 bit)
    device OUT endpoint common interrupt enable register (DOEPINTEN)
    address_offset : 0x14 Bytes (0x0)
    size : 32 bit
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
TFEN : Transfer finished interrupt enable
    bits : 0 - 0 (1 bit)
EPDISEN : Endpoint disabled interrupt enable
    bits : 1 - 1 (1 bit)
STPFEN : SETUP phase finished interrupt enable
    bits : 3 - 3 (1 bit)
EPRXFOVREN : Endpoint Rx FIFO overrun interrupt enable
    bits : 4 - 4 (1 bit)
BTBSTPEN : Back-to-back SETUP packets interrupt enable
    bits : 6 - 6 (1 bit)
    device endpoint-2 control register
    address_offset : 0x140 Bytes (0x0)
    size : 32 bit
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
MPL : maximum packet length
    bits : 0 - 10 (11 bit)
    access : read-write
EPACT : Endpoint active
    bits : 15 - 15 (1 bit)
    access : read-write
EOFRM_DPID : EOFRM/DPID
    bits : 16 - 16 (1 bit)
    access : read-only
NAKS : NAK status
    bits : 17 - 17 (1 bit)
    access : read-only
EPTYPE : Endpoint type
    bits : 18 - 19 (2 bit)
    access : read-write
STALL : STALL handshake
    bits : 21 - 21 (1 bit)
    access : read-write
TXFNUM : Tx FIFO number
    bits : 22 - 25 (4 bit)
    access : read-write
CNAK : Clear NAK
    bits : 26 - 26 (1 bit)
    access : write-only
SNAK : Set NAK
    bits : 27 - 27 (1 bit)
    access : write-only
SD0PID_SEVENFRM : SD0PID/SEVNFRM
    bits : 28 - 28 (1 bit)
    access : write-only
SD1PID_SODDFRM : Set DATA1 PID/Set odd frame
    bits : 29 - 29 (1 bit)
    access : write-only
EPD : Endpoint disable
    bits : 30 - 30 (1 bit)
    access : read-write
EPEN : Endpoint enable
    bits : 31 - 31 (1 bit)
    access : read-write
    device endpoint-2 interrupt register
    address_offset : 0x148 Bytes (0x0)
    size : 32 bit
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
TF : Transfer finished
    bits : 0 - 0 (1 bit)
    access : read-write
EPDIS : Endpoint finished
    bits : 1 - 1 (1 bit)
    access : read-write
CITO : Control in timeout interrupt
    bits : 3 - 3 (1 bit)
    access : read-write
EPTXFUD : Endpoint Tx FIFO underrun
    bits : 4 - 4 (1 bit)
    access : read-write
IEPNE : IN endpoint NAK effective
    bits : 6 - 6 (1 bit)
    access : read-write
TXFE : Transmit FIFO empty
    bits : 7 - 7 (1 bit)
    access : read-only
    device IN endpoint-2 transfer length register
    address_offset : 0x150 Bytes (0x0)
    size : 32 bit
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
TLEN : Transfer length
    bits : 0 - 18 (19 bit)
PCNT : Packet count
    bits : 19 - 28 (10 bit)
MCPF : Multi packet count per frame
    bits : 29 - 30 (2 bit)
    device IN endpoint 2 transmit FIFO status register
    address_offset : 0x158 Bytes (0x0)
    size : 32 bit
    access : read-only
    reset_value : 0x0
    reset_Mask : 0x0
    
IEPTFS : IN endpoint TxFIFO space remaining
    bits : 0 - 15 (16 bit)
    device endpoint-3 control register
    address_offset : 0x160 Bytes (0x0)
    size : 32 bit
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
MPL : maximum packet length
    bits : 0 - 10 (11 bit)
    access : read-write
EPACT : Endpoint active
    bits : 15 - 15 (1 bit)
    access : read-write
EOFRM_DPID : EOFRM/DPID
    bits : 16 - 16 (1 bit)
    access : read-only
NAKS : NAK status
    bits : 17 - 17 (1 bit)
    access : read-only
EPTYPE : Endpoint type
    bits : 18 - 19 (2 bit)
    access : read-write
STALL : STALL handshake
    bits : 21 - 21 (1 bit)
    access : read-write
TXFNUM : Tx FIFO number
    bits : 22 - 25 (4 bit)
    access : read-write
CNAK : Clear NAK
    bits : 26 - 26 (1 bit)
    access : write-only
SNAK : Set NAK
    bits : 27 - 27 (1 bit)
    access : write-only
SD0PID_SEVENFRM : SD0PID/SEVNFRM
    bits : 28 - 28 (1 bit)
    access : write-only
SD1PID_SODDFRM : Set DATA1 PID/Set odd frame
    bits : 29 - 29 (1 bit)
    access : write-only
EPD : Endpoint disable
    bits : 30 - 30 (1 bit)
    access : read-write
EPEN : Endpoint enable
    bits : 31 - 31 (1 bit)
    access : read-write
    device endpoint-3 interrupt register
    address_offset : 0x168 Bytes (0x0)
    size : 32 bit
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
TF : Transfer finished
    bits : 0 - 0 (1 bit)
    access : read-write
EPDIS : Endpoint finished
    bits : 1 - 1 (1 bit)
    access : read-write
CITO : Control in timeout interrupt
    bits : 3 - 3 (1 bit)
    access : read-write
EPTXFUD : Endpoint Tx FIFO underrun
    bits : 4 - 4 (1 bit)
    access : read-write
IEPNE : IN endpoint NAK effective
    bits : 6 - 6 (1 bit)
    access : read-write
TXFE : Transmit FIFO empty
    bits : 7 - 7 (1 bit)
    access : read-only
    device IN endpoint-3 transfer length register
    address_offset : 0x170 Bytes (0x0)
    size : 32 bit
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
TLEN : Transfer length
    bits : 0 - 18 (19 bit)
PCNT : Packet count
    bits : 19 - 28 (10 bit)
MCPF : Multi packet count per frame
    bits : 29 - 30 (2 bit)
    device IN endpoint 3 transmit FIFO status register
    address_offset : 0x178 Bytes (0x0)
    size : 32 bit
    access : read-only
    reset_value : 0x0
    reset_Mask : 0x0
    
IEPTFS : IN endpoint TxFIFO space remaining
    bits : 0 - 15 (16 bit)
    device all endpoints interrupt register (DAEPINT)
    address_offset : 0x18 Bytes (0x0)
    size : 32 bit
    access : read-only
    reset_value : 0x0
    reset_Mask : 0x0
    
IEPITB : Device all IN endpoint interrupt bits
    bits : 0 - 3 (4 bit)
OEPITB : Device all OUT endpoint interrupt bits
    bits : 16 - 19 (4 bit)
    Device all endpoints interrupt enable register (DAEPINTEN)
    address_offset : 0x1C Bytes (0x0)
    size : 32 bit
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
IEPIE : IN EP interrupt interrupt enable bits
    bits : 0 - 3 (4 bit)
OEPIE : OUT endpoint interrupt enable bits
    bits : 16 - 19 (4 bit)
    device VBUS discharge time register
    address_offset : 0x28 Bytes (0x0)
    size : 32 bit
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
DVBUSDT : Device VBUS discharge time
    bits : 0 - 15 (16 bit)
    device VBUS pulsing time register
    address_offset : 0x2C Bytes (0x0)
    size : 32 bit
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
DVBUSPT : Device VBUS pulsing time
    bits : 0 - 11 (12 bit)
    device endpoint-0 control register
    address_offset : 0x300 Bytes (0x0)
    size : 32 bit
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
MPL : Maximum packet length
    bits : 0 - 1 (2 bit)
    access : read-only
EPACT : Endpoint active
    bits : 15 - 15 (1 bit)
    access : read-only
NAKS : NAK status
    bits : 17 - 17 (1 bit)
    access : read-only
EPTYPE : Endpoint type
    bits : 18 - 19 (2 bit)
    access : read-only
SNOOP : Snoop mode
    bits : 20 - 20 (1 bit)
    access : read-write
STALL : STALL handshake
    bits : 21 - 21 (1 bit)
    access : read-write
CNAK : Clear NAK
    bits : 26 - 26 (1 bit)
    access : write-only
SNAK : Set NAK
    bits : 27 - 27 (1 bit)
    access : write-only
EPD : Endpoint disable
    bits : 30 - 30 (1 bit)
    access : read-only
EPEN : Endpoint enable
    bits : 31 - 31 (1 bit)
    access : write-only
    device out endpoint-0 interrupt flag register
    address_offset : 0x308 Bytes (0x0)
    size : 32 bit
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
TF : Transfer finished
    bits : 0 - 0 (1 bit)
EPDIS : Endpoint disabled
    bits : 1 - 1 (1 bit)
STPF : Setup phase finished
    bits : 3 - 3 (1 bit)
EPRXFOVR : Endpoint Rx FIFO overrun
    bits : 4 - 4 (1 bit)
BTBSTP : Back-to-back SETUP packets
    bits : 6 - 6 (1 bit)
    device OUT endpoint-0 transfer length register
    address_offset : 0x310 Bytes (0x0)
    size : 32 bit
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
TLEN : Transfer length
    bits : 0 - 6 (7 bit)
PCNT : Packet count
    bits : 19 - 19 (1 bit)
STPCNT : SETUP packet count
    bits : 29 - 30 (2 bit)
    device endpoint-1 control register
    address_offset : 0x320 Bytes (0x0)
    size : 32 bit
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
MPL : maximum packet length
    bits : 0 - 10 (11 bit)
    access : read-write
EPACT : Endpoint active
    bits : 15 - 15 (1 bit)
    access : read-write
EOFRM_DPID : EOFRM/DPID
    bits : 16 - 16 (1 bit)
    access : read-only
NAKS : NAK status
    bits : 17 - 17 (1 bit)
    access : read-only
EPTYPE : Endpoint type
    bits : 18 - 19 (2 bit)
    access : read-write
SNOOP : Snoop mode
    bits : 20 - 20 (1 bit)
    access : read-write
STALL : STALL handshake
    bits : 21 - 21 (1 bit)
    access : read-write
CNAK : Clear NAK
    bits : 26 - 26 (1 bit)
    access : write-only
SNAK : Set NAK
    bits : 27 - 27 (1 bit)
    access : write-only
SD0PID_SEVENFRM : SD0PID/SEVENFRM
    bits : 28 - 28 (1 bit)
    access : write-only
SD1PID_SODDFRM : SD1PID/SODDFRM
    bits : 29 - 29 (1 bit)
    access : write-only
EPD : Endpoint disable
    bits : 30 - 30 (1 bit)
    access : read-write
EPEN : Endpoint enable
    bits : 31 - 31 (1 bit)
    access : read-write
    device out endpoint-1 interrupt flag register
    address_offset : 0x328 Bytes (0x0)
    size : 32 bit
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
TF : Transfer finished
    bits : 0 - 0 (1 bit)
EPDIS : Endpoint disabled
    bits : 1 - 1 (1 bit)
STPF : Setup phase finished
    bits : 3 - 3 (1 bit)
EPRXFOVR : Endpoint Rx FIFO overrun
    bits : 4 - 4 (1 bit)
BTBSTP : Back-to-back SETUP packets
    bits : 6 - 6 (1 bit)
    device OUT endpoint-1 transfer length register
    address_offset : 0x330 Bytes (0x0)
    size : 32 bit
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
TLEN : Transfer length
    bits : 0 - 18 (19 bit)
PCNT : Packet count
    bits : 19 - 28 (10 bit)
STPCNT_RXDPID : SETUP packet count/Received data PID
    bits : 29 - 30 (2 bit)
    device IN endpoint FIFO empty interrupt enable register
    address_offset : 0x34 Bytes (0x0)
    size : 32 bit
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
IEPTXFEIE : IN EP Tx FIFO empty interrupt enable bits
    bits : 0 - 3 (4 bit)
    device endpoint-2 control register
    address_offset : 0x340 Bytes (0x0)
    size : 32 bit
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
MPL : maximum packet length
    bits : 0 - 10 (11 bit)
    access : read-write
EPACT : Endpoint active
    bits : 15 - 15 (1 bit)
    access : read-write
EOFRM_DPID : EOFRM/DPID
    bits : 16 - 16 (1 bit)
    access : read-only
NAKS : NAK status
    bits : 17 - 17 (1 bit)
    access : read-only
EPTYPE : Endpoint type
    bits : 18 - 19 (2 bit)
    access : read-write
SNOOP : Snoop mode
    bits : 20 - 20 (1 bit)
    access : read-write
STALL : STALL handshake
    bits : 21 - 21 (1 bit)
    access : read-write
CNAK : Clear NAK
    bits : 26 - 26 (1 bit)
    access : write-only
SNAK : Set NAK
    bits : 27 - 27 (1 bit)
    access : write-only
SD0PID_SEVENFRM : SD0PID/SEVENFRM
    bits : 28 - 28 (1 bit)
    access : write-only
SD1PID_SODDFRM : SD1PID/SODDFRM
    bits : 29 - 29 (1 bit)
    access : write-only
EPD : Endpoint disable
    bits : 30 - 30 (1 bit)
    access : read-write
EPEN : Endpoint enable
    bits : 31 - 31 (1 bit)
    access : read-write
    device out endpoint-2 interrupt flag register
    address_offset : 0x348 Bytes (0x0)
    size : 32 bit
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
TF : Transfer finished
    bits : 0 - 0 (1 bit)
EPDIS : Endpoint disabled
    bits : 1 - 1 (1 bit)
STPF : Setup phase finished
    bits : 3 - 3 (1 bit)
EPRXFOVR : Endpoint Rx FIFO overrun
    bits : 4 - 4 (1 bit)
BTBSTP : Back-to-back SETUP packets
    bits : 6 - 6 (1 bit)
    device OUT endpoint-2 transfer length register
    address_offset : 0x350 Bytes (0x0)
    size : 32 bit
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
TLEN : Transfer length
    bits : 0 - 18 (19 bit)
PCNT : Packet count
    bits : 19 - 28 (10 bit)
STPCNT_RXDPID : SETUP packet count/Received data PID
    bits : 29 - 30 (2 bit)
    device endpoint-3 control register
    address_offset : 0x360 Bytes (0x0)
    size : 32 bit
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
MPL : maximum packet length
    bits : 0 - 10 (11 bit)
    access : read-write
EPACT : Endpoint active
    bits : 15 - 15 (1 bit)
    access : read-write
EOFRM_DPID : EOFRM/DPID
    bits : 16 - 16 (1 bit)
    access : read-only
NAKS : NAK status
    bits : 17 - 17 (1 bit)
    access : read-only
EPTYPE : Endpoint type
    bits : 18 - 19 (2 bit)
    access : read-write
SNOOP : Snoop mode
    bits : 20 - 20 (1 bit)
    access : read-write
STALL : STALL handshake
    bits : 21 - 21 (1 bit)
    access : read-write
CNAK : Clear NAK
    bits : 26 - 26 (1 bit)
    access : write-only
SNAK : Set NAK
    bits : 27 - 27 (1 bit)
    access : write-only
SD0PID_SEVENFRM : SD0PID/SEVENFRM
    bits : 28 - 28 (1 bit)
    access : write-only
SD1PID_SODDFRM : SD1PID/SODDFRM
    bits : 29 - 29 (1 bit)
    access : write-only
EPD : Endpoint disable
    bits : 30 - 30 (1 bit)
    access : read-write
EPEN : Endpoint enable
    bits : 31 - 31 (1 bit)
    access : read-write
    device out endpoint-3 interrupt flag register
    address_offset : 0x368 Bytes (0x0)
    size : 32 bit
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
TF : Transfer finished
    bits : 0 - 0 (1 bit)
EPDIS : Endpoint disabled
    bits : 1 - 1 (1 bit)
STPF : Setup phase finished
    bits : 3 - 3 (1 bit)
EPRXFOVR : Endpoint Rx FIFO overrun
    bits : 4 - 4 (1 bit)
BTBSTP : Back-to-back SETUP packets
    bits : 6 - 6 (1 bit)
    device OUT endpoint-3 transfer length register
    address_offset : 0x370 Bytes (0x0)
    size : 32 bit
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
TLEN : Transfer length
    bits : 0 - 18 (19 bit)
PCNT : Packet count
    bits : 19 - 28 (10 bit)
STPCNT_RXDPID : SETUP packet count/Received data PID
    bits : 29 - 30 (2 bit)
    device control register (DCTL)
    address_offset : 0x4 Bytes (0x0)
    size : 32 bit
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
RWKUP : Remote wakeup
    bits : 0 - 0 (1 bit)
    access : read-write
SD : Soft disconnect
    bits : 1 - 1 (1 bit)
    access : read-write
GINS : Global IN NAK status
    bits : 2 - 2 (1 bit)
    access : read-only
GONS : Global OUT NAK status
    bits : 3 - 3 (1 bit)
    access : read-only
SGINAK : Set global IN NAK
    bits : 7 - 7 (1 bit)
    access : write-only
CGINAK : Clear global IN NAK
    bits : 8 - 8 (1 bit)
    access : write-only
SGONAK : Set global OUT NAK
    bits : 9 - 9 (1 bit)
    access : write-only
CGONAK : Clear global OUT NAK
    bits : 10 - 10 (1 bit)
    access : write-only
POIF : Power-on initialization flag
    bits : 11 - 11 (1 bit)
    access : read-write
    device status register (DSTAT)
    address_offset : 0x8 Bytes (0x0)
    size : 32 bit
    access : read-only
    reset_value : 0x0
    reset_Mask : 0x0
    
SPST : Suspend status
    bits : 0 - 0 (1 bit)
ES : Enumerated speed
    bits : 1 - 2 (2 bit)
FNRSOF : Frame number of the received SOF
    bits : 8 - 21 (14 bit)
Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !
This website is sponsored by 
Embeetle, an IDE designed from scratch for embedded software developers.