\n
address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :
Control register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CAP : Capture Enable
bits : 0 - 0 (1 bit)
SNAP : Snapshot mode
bits : 1 - 1 (1 bit)
WDEN : Window Enable
bits : 2 - 2 (1 bit)
JM : JPEG mode
bits : 3 - 3 (1 bit)
ESM : Embedded Synchronous Mode
bits : 4 - 4 (1 bit)
CKS : Clock Polarity Selection
bits : 5 - 5 (1 bit)
HPS : Horizontal Polarity Selection
bits : 6 - 6 (1 bit)
VPS : Vertical Polarity Selection
bits : 7 - 7 (1 bit)
FR : Frame rate
bits : 8 - 9 (2 bit)
DCIF : Digital camera interface format
bits : 10 - 11 (2 bit)
DCIEN : DCI Enable
bits : 14 - 14 (1 bit)
Interrupt flag register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
EFIF : End of Frame Interrupt Flag
bits : 0 - 0 (1 bit)
OVRIF : FIFO Overrun Interrupt Flag
bits : 1 - 1 (1 bit)
ESEIF : Embedded Synchronous Error Interrupt Flag
bits : 2 - 2 (1 bit)
VSIF : Vsync Interrupt Flag
bits : 3 - 3 (1 bit)
ELIF : End of Line Interrupt Flag
bits : 4 - 4 (1 bit)
Interrupt flag clear register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
EFFC : Clear End of Frame Flag
bits : 0 - 0 (1 bit)
OVRFC : Clear FIFO Overrun Flag
bits : 1 - 1 (1 bit)
ESEFC : Clear embedded synchronous Error Flag
bits : 2 - 2 (1 bit)
VSFC : Vsync flag clear
bits : 3 - 3 (1 bit)
ELFC : End of Line Flag Clear
bits : 4 - 4 (1 bit)
Synchronization codes register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FS : Frame Start Code in Embedded Synchronous Mode
bits : 0 - 7 (8 bit)
LS : Line Start Code in Embedded Synchronous Mode
bits : 8 - 15 (8 bit)
LE : Line End Code in Embedded Synchronous Mode
bits : 16 - 23 (8 bit)
FE : Frame End Code in Embedded Synchronous Mode
bits : 24 - 31 (8 bit)
Synchronization codes unmask register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FSM : Frame Start Code unMask Bits in Embedded Synchronous Mode
bits : 0 - 7 (8 bit)
LSM : Line Start Code unMask Bits in Embedded Synchronous Mode
bits : 8 - 15 (8 bit)
LEM : Line End Code unMask Bits in Embedded Synchronous Mode
bits : 16 - 23 (8 bit)
FEM : Frame End Code unMask Bits in Embedded Synchronous Mode
bits : 24 - 31 (8 bit)
Cropping window start position register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WHSP : Window Horizontal Start Position
bits : 0 - 13 (14 bit)
WVSP : Window Vertical Start Position
bits : 16 - 28 (13 bit)
Cropping window size register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WHSZ : Window Horizontal Size
bits : 0 - 13 (14 bit)
WVSZ : Window Vertical Size
bits : 16 - 29 (14 bit)
DATA register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DT0 : Pixel Data 0
bits : 0 - 7 (8 bit)
DT1 : Pixel Data 1
bits : 8 - 15 (8 bit)
DT2 : Pixel Data 2
bits : 16 - 23 (8 bit)
DT3 : Pixel Data 3
bits : 24 - 31 (8 bit)
Status register 0
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
HS : HS line status
bits : 0 - 0 (1 bit)
VS : VS line status
bits : 1 - 1 (1 bit)
FV : FIFO Valid
bits : 2 - 2 (1 bit)
Status register 1
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
EFF : End of Frame Flag
bits : 0 - 0 (1 bit)
OVRF : FIFO Overrun Flag
bits : 1 - 1 (1 bit)
ESEF : Embedded Synchronous Error Flag
bits : 2 - 2 (1 bit)
VSF : Vsync Flag
bits : 3 - 3 (1 bit)
ELF : End of Line Flag
bits : 4 - 4 (1 bit)
Interrupt enable register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EFIE : End of Frame Interrupt Enable
bits : 0 - 0 (1 bit)
OVRIE : FIFO Overrun Interrupt Enable
bits : 1 - 1 (1 bit)
ESEIE : Embedded Synchronous Error Interrupt Enable
bits : 2 - 2 (1 bit)
VSIE : Vsync Interrupt Enable
bits : 3 - 3 (1 bit)
ELIE : End of Line Interrupt Enable
bits : 4 - 4 (1 bit)
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