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GPIO

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :

Registers

CTL

ISTAT

OCTL

BOP

LOCK

AFSEL0

AFSEL1

BC

TG

OMODE

OSPD

PUD


CTL

GPIO port control register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTL CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CTL0 CTL1 CTL2 CTL3 CTL4 CTL5 CTL6 CTL7 CTL8 CTL9 CTL10 CTL11 CTL12 CTL13 CTL14 CTL15

CTL0 : Port x configuration bits (x = 0)
bits : 0 - 1 (2 bit)

CTL1 : Port x configuration bits (x = 1)
bits : 2 - 3 (2 bit)

CTL2 : Port x configuration bits (x = 2)
bits : 4 - 5 (2 bit)

CTL3 : Port x configuration bits (x = 3)
bits : 6 - 7 (2 bit)

CTL4 : Port x configuration bits (x = 4 )
bits : 8 - 9 (2 bit)

CTL5 : Port x configuration bits (x = 5)
bits : 10 - 11 (2 bit)

CTL6 : Port x configuration bits (x = 6 )
bits : 12 - 13 (2 bit)

CTL7 : Port x configuration bits (x = 7)
bits : 14 - 15 (2 bit)

CTL8 : Port x configuration bits (x = 8)
bits : 16 - 17 (2 bit)

CTL9 : Port x configuration bits (x = 9)
bits : 18 - 19 (2 bit)

CTL10 : Port x configuration bits (x = 10)
bits : 20 - 21 (2 bit)

CTL11 : Port x configuration bits (x = 11)
bits : 22 - 23 (2 bit)

CTL12 : Port x configuration bits (x = 12)
bits : 24 - 25 (2 bit)

CTL13 : Port x configuration bits (x = 13)
bits : 26 - 27 (2 bit)

CTL14 : Port x configuration bits (x = 14)
bits : 28 - 29 (2 bit)

CTL15 : Port x configuration bits (x = 15)
bits : 30 - 31 (2 bit)


ISTAT

GPIO port input status register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ISTAT ISTAT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ISTAT0 ISTAT1 ISTAT2 ISTAT3 ISTAT4 ISTAT5 ISTAT6 ISTAT7 ISTAT8 ISTAT9 ISTAT10 ISTAT11 ISTAT12 ISTAT13 ISTAT14 ISTAT15

ISTAT0 : Port input status (y = 0)
bits : 0 - 0 (1 bit)

ISTAT1 : Port input status (y = 1)
bits : 1 - 1 (1 bit)

ISTAT2 : Port input status (y = 2)
bits : 2 - 2 (1 bit)

ISTAT3 : Port input status (y = 3)
bits : 3 - 3 (1 bit)

ISTAT4 : Port input status (y = 4)
bits : 4 - 4 (1 bit)

ISTAT5 : Port input status (y = 5)
bits : 5 - 5 (1 bit)

ISTAT6 : Port input status (y = 6)
bits : 6 - 6 (1 bit)

ISTAT7 : Port input status (y = 7)
bits : 7 - 7 (1 bit)

ISTAT8 : Port input status (y = 8)
bits : 8 - 8 (1 bit)

ISTAT9 : Port input status (y = 9)
bits : 9 - 9 (1 bit)

ISTAT10 : Port input status (y = 10)
bits : 10 - 10 (1 bit)

ISTAT11 : Port input status (y = 11)
bits : 11 - 11 (1 bit)

ISTAT12 : Port input status (y = 12)
bits : 12 - 12 (1 bit)

ISTAT13 : Port input status (y = 13)
bits : 13 - 13 (1 bit)

ISTAT14 : Port input status (y = 14)
bits : 14 - 14 (1 bit)

ISTAT15 : Port input status (y = 15)
bits : 15 - 15 (1 bit)


OCTL

GPIO port output control register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OCTL OCTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OCTL0 OCTL1 OCTL2 OCTL3 OCTL4 OCTL5 OCTL6 OCTL7 OCTL8 OCTL9 OCTL10 OCTL11 OCTL12 OCTL13 OCTL14 OCTL15

OCTL0 : Port output control (y = 0)
bits : 0 - 0 (1 bit)

OCTL1 : Port output control (y = 1)
bits : 1 - 1 (1 bit)

OCTL2 : Port output control (y = 2)
bits : 2 - 2 (1 bit)

OCTL3 : Port output control (y = 3)
bits : 3 - 3 (1 bit)

OCTL4 : Port output control (y = 4)
bits : 4 - 4 (1 bit)

OCTL5 : Port output control (y = 5)
bits : 5 - 5 (1 bit)

OCTL6 : Port output control (y = 6)
bits : 6 - 6 (1 bit)

OCTL7 : Port output control (y = 7)
bits : 7 - 7 (1 bit)

OCTL8 : Port output control (y = 8)
bits : 8 - 8 (1 bit)

OCTL9 : Port output control (y = 9)
bits : 9 - 9 (1 bit)

OCTL10 : Port output control (y = 10)
bits : 10 - 10 (1 bit)

OCTL11 : Port output control (y = 11)
bits : 11 - 11 (1 bit)

OCTL12 : Port output control (y = 12)
bits : 12 - 12 (1 bit)

OCTL13 : Port output control (y = 13)
bits : 13 - 13 (1 bit)

OCTL14 : Port output control (y = 14)
bits : 14 - 14 (1 bit)

OCTL15 : Port output control (y = 15)
bits : 15 - 15 (1 bit)


BOP

GPIO port bit operate register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

BOP BOP write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BOP0 BOP1 BOP2 BOP3 BOP4 BOP5 BOP6 BOP7 BOP8 BOP9 BOP10 BOP11 BOP12 BOP13 BOP14 BOP15 CR0 CR1 CR2 CR3 CR4 CR5 CR6 CR7 CR8 CR9 CR10 CR11 CR12 CR13 CR14 CR15

BOP0 : Port Set bit 0
bits : 0 - 0 (1 bit)

BOP1 : Port Set bit 1
bits : 1 - 1 (1 bit)

BOP2 : Port Set bit 2
bits : 2 - 2 (1 bit)

BOP3 : Port Set bit 3
bits : 3 - 3 (1 bit)

BOP4 : Port Set bit 4
bits : 4 - 4 (1 bit)

BOP5 : Port Set bit 5
bits : 5 - 5 (1 bit)

BOP6 : Port Set bit 6
bits : 6 - 6 (1 bit)

BOP7 : Port Set bit 7
bits : 7 - 7 (1 bit)

BOP8 : Port Set bit 8
bits : 8 - 8 (1 bit)

BOP9 : Port Set bit 9
bits : 9 - 9 (1 bit)

BOP10 : Port Set bit 10
bits : 10 - 10 (1 bit)

BOP11 : Port Set bit 11
bits : 11 - 11 (1 bit)

BOP12 : Port Set bit 12
bits : 12 - 12 (1 bit)

BOP13 : Port Set bit 13
bits : 13 - 13 (1 bit)

BOP14 : Port Set bit 14
bits : 14 - 14 (1 bit)

BOP15 : Port Set bit 15
bits : 15 - 15 (1 bit)

CR0 : Port Clear bit 0
bits : 16 - 16 (1 bit)

CR1 : Port Clear bit 1
bits : 17 - 17 (1 bit)

CR2 : Port Clear bit 2
bits : 18 - 18 (1 bit)

CR3 : Port Clear bit 3
bits : 19 - 19 (1 bit)

CR4 : Port Clear bit 4
bits : 20 - 20 (1 bit)

CR5 : Port Clear bit 5
bits : 21 - 21 (1 bit)

CR6 : Port Clear bit 6
bits : 22 - 22 (1 bit)

CR7 : Port Clear bit 7
bits : 23 - 23 (1 bit)

CR8 : Port Clear bit 8
bits : 24 - 24 (1 bit)

CR9 : Port Clear bit 9
bits : 25 - 25 (1 bit)

CR10 : Port Clear bit 10
bits : 26 - 26 (1 bit)

CR11 : Port Clear bit 11
bits : 27 - 27 (1 bit)

CR12 : Port Clear bit 12
bits : 28 - 28 (1 bit)

CR13 : Port Clear bit 13
bits : 29 - 29 (1 bit)

CR14 : Port Clear bit 14
bits : 30 - 30 (1 bit)

CR15 : Port Clear bit 15
bits : 31 - 31 (1 bit)


LOCK

GPIO port configuration lock register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LOCK LOCK read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LK0 LK1 LK2 LK3 LK4 LK5 LK6 LK7 LK8 LK9 LK10 LK11 LK12 LK13 LK14 LK15 LKK

LK0 : Port Lock bit 0
bits : 0 - 0 (1 bit)

LK1 : Port Lock bit 1
bits : 1 - 1 (1 bit)

LK2 : Port Lock bit 2
bits : 2 - 2 (1 bit)

LK3 : Port Lock bit 3
bits : 3 - 3 (1 bit)

LK4 : Port Lock bit 4
bits : 4 - 4 (1 bit)

LK5 : Port Lock bit 5
bits : 5 - 5 (1 bit)

LK6 : Port Lock bit 6
bits : 6 - 6 (1 bit)

LK7 : Port Lock bit 7
bits : 7 - 7 (1 bit)

LK8 : Port Lock bit 8
bits : 8 - 8 (1 bit)

LK9 : Port Lock bit 9
bits : 9 - 9 (1 bit)

LK10 : Port Lock bit 10
bits : 10 - 10 (1 bit)

LK11 : Port Lock bit 11
bits : 11 - 11 (1 bit)

LK12 : Port Lock bit 12
bits : 12 - 12 (1 bit)

LK13 : Port Lock bit 13
bits : 13 - 13 (1 bit)

LK14 : Port Lock bit 14
bits : 14 - 14 (1 bit)

LK15 : Port Lock bit 15
bits : 15 - 15 (1 bit)

LKK : Lock sequence key
bits : 16 - 16 (1 bit)


AFSEL0

GPIO alternate function selected register 0
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AFSEL0 AFSEL0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SEL0 SEL1 SEL2 SEL3 SEL4 SEL5 SEL6 SEL7

SEL0 : Port 0 alternate function selected
bits : 0 - 3 (4 bit)

SEL1 : Port 1 alternate function selected
bits : 4 - 7 (4 bit)

SEL2 : Port 2 alternate function selected
bits : 8 - 11 (4 bit)

SEL3 : Port 3 alternate function selected
bits : 12 - 15 (4 bit)

SEL4 : Port 4 alternate function selected
bits : 16 - 19 (4 bit)

SEL5 : Port 5 alternate function selected
bits : 20 - 23 (4 bit)

SEL6 : Port 6 alternate function selected
bits : 24 - 27 (4 bit)

SEL7 : Port 7 alternate function selected
bits : 28 - 31 (4 bit)


AFSEL1

GPIO alternate function selected register 1
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AFSEL1 AFSEL1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SEL8 SEL9 SEL10 SEL11 SEL12 SEL13 SEL14 SEL15

SEL8 : Port 8 alternate function selected
bits : 0 - 3 (4 bit)

SEL9 : Port 9 alternate function selected
bits : 4 - 7 (4 bit)

SEL10 : Port 10 alternate function selected
bits : 8 - 11 (4 bit)

SEL11 : Port 11 alternate function selected
bits : 12 - 15 (4 bit)

SEL12 : Port 12 alternate function selected
bits : 16 - 19 (4 bit)

SEL13 : Port 13 alternate function selected
bits : 20 - 23 (4 bit)

SEL14 : Port 14 alternate function selected
bits : 24 - 27 (4 bit)

SEL15 : Port 15 alternate function selected
bits : 28 - 31 (4 bit)


BC

Bit clear register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

BC BC write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CR0 CR1 CR2 CR3 CR4 CR5 CR6 CR7 CR8 CR9 CR10 CR11 CR12 CR13 CR14 CR15

CR0 : Port cleat bit
bits : 0 - 0 (1 bit)

CR1 : Port cleat bit
bits : 1 - 1 (1 bit)

CR2 : Port cleat bit
bits : 2 - 2 (1 bit)

CR3 : Port cleat bit
bits : 3 - 3 (1 bit)

CR4 : Port cleat bit
bits : 4 - 4 (1 bit)

CR5 : Port cleat bit
bits : 5 - 5 (1 bit)

CR6 : Port cleat bit
bits : 6 - 6 (1 bit)

CR7 : Port cleat bit
bits : 7 - 7 (1 bit)

CR8 : Port cleat bit
bits : 8 - 8 (1 bit)

CR9 : Port cleat bit
bits : 9 - 9 (1 bit)

CR10 : Port cleat bit
bits : 10 - 10 (1 bit)

CR11 : Port cleat bit
bits : 11 - 11 (1 bit)

CR12 : Port cleat bit
bits : 12 - 12 (1 bit)

CR13 : Port cleat bit
bits : 13 - 13 (1 bit)

CR14 : Port cleat bit
bits : 14 - 14 (1 bit)

CR15 : Port cleat bit
bits : 15 - 15 (1 bit)


TG

Port bit toggle register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

TG TG write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TG0 TG1 TG2 TG3 TG4 TG5 TG6 TG7 TG8 TG9 TG10 TG11 TG12 TG13 TG14 TG15

TG0 : Port toggle bit
bits : 0 - 0 (1 bit)

TG1 : Port toggle bit
bits : 1 - 1 (1 bit)

TG2 : Port toggle bit
bits : 2 - 2 (1 bit)

TG3 : Port toggle bit
bits : 3 - 3 (1 bit)

TG4 : Port toggle bit
bits : 4 - 4 (1 bit)

TG5 : Port toggle bit
bits : 5 - 5 (1 bit)

TG6 : Port toggle bit
bits : 6 - 6 (1 bit)

TG7 : Port toggle bit
bits : 7 - 7 (1 bit)

TG8 : Port toggle bit
bits : 8 - 8 (1 bit)

TG9 : Port toggle bit
bits : 9 - 9 (1 bit)

TG10 : Port toggle bit
bits : 10 - 10 (1 bit)

TG11 : Port toggle bit
bits : 11 - 11 (1 bit)

TG12 : Port toggle bit
bits : 12 - 12 (1 bit)

TG13 : Port toggle bit
bits : 13 - 13 (1 bit)

TG14 : Port toggle bit
bits : 14 - 14 (1 bit)

TG15 : Port toggle bit
bits : 15 - 15 (1 bit)


OMODE

GPIO port output mode register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OMODE OMODE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OM0 OM1 OM2 OM3 OM4 OM5 OM6 OM7 OM8 OM9 OM10 OM11 OM12 OM13 OM14 OM15

OM0 : Port 0 output mode bit
bits : 0 - 0 (1 bit)

OM1 : Port 1 output mode bit
bits : 1 - 1 (1 bit)

OM2 : Port 2 output mode bit
bits : 2 - 2 (1 bit)

OM3 : Port 3 output mode bit
bits : 3 - 3 (1 bit)

OM4 : Port 4 output mode bit
bits : 4 - 4 (1 bit)

OM5 : Port 5 output mode bit
bits : 5 - 5 (1 bit)

OM6 : Port 6 output mode bit
bits : 6 - 6 (1 bit)

OM7 : Port 7 output mode bit
bits : 7 - 7 (1 bit)

OM8 : Port 8 output mode bit
bits : 8 - 8 (1 bit)

OM9 : Port 9 output mode bit
bits : 9 - 9 (1 bit)

OM10 : Port 10 output mode bit
bits : 10 - 10 (1 bit)

OM11 : Port 11 output mode bit
bits : 11 - 11 (1 bit)

OM12 : Port 12 output mode bit
bits : 12 - 12 (1 bit)

OM13 : Port 13 output mode bit
bits : 13 - 13 (1 bit)

OM14 : Port 14 output mode bit
bits : 14 - 14 (1 bit)

OM15 : Port 15 output mode bit
bits : 15 - 15 (1 bit)


OSPD

GPIO port output speed register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OSPD OSPD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OSPD0 OSPD1 OSPD2 OSPD3 OSPD4 OSPD5 OSPD6 OSPD7 OSPD8 OSPD9 OSPD10 OSPD11 OSPD12 OSPD13 OSPD14 OSPD15

OSPD0 : Port 0 output max speed bits
bits : 0 - 1 (2 bit)

OSPD1 : Port 1 output max speed bits
bits : 2 - 3 (2 bit)

OSPD2 : Port 2 output max speed bits
bits : 4 - 5 (2 bit)

OSPD3 : Port 3 output max speed bits
bits : 6 - 7 (2 bit)

OSPD4 : Port 4 output max speed bits
bits : 8 - 9 (2 bit)

OSPD5 : Port 5 output max speed bits
bits : 10 - 11 (2 bit)

OSPD6 : Port 6 output max speed bits
bits : 12 - 13 (2 bit)

OSPD7 : Port 7 output max speed bits
bits : 14 - 15 (2 bit)

OSPD8 : Port 8 output max speed bits
bits : 16 - 17 (2 bit)

OSPD9 : Port 9 output max speed bits
bits : 18 - 19 (2 bit)

OSPD10 : Port 10 output max speed bits
bits : 20 - 21 (2 bit)

OSPD11 : Port 11 output max speed bits
bits : 22 - 23 (2 bit)

OSPD12 : Port 12 output max speed bits
bits : 24 - 25 (2 bit)

OSPD13 : Port 13 output max speed bits
bits : 26 - 27 (2 bit)

OSPD14 : Port 14 output max speed bits
bits : 28 - 29 (2 bit)

OSPD15 : Port 15 output max speed bits
bits : 30 - 31 (2 bit)


PUD

GPIO port pull-up/pull-down register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PUD PUD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PUD0 PUD1 PUD2 PUD3 PUD4 PUD5 PUD6 PUD7 PUD8 PUD9 PUD10 PUD11 PUD12 PUD13 PUD14 PUD15

PUD0 : Port 0 pull-up or pull-down bits
bits : 0 - 1 (2 bit)

PUD1 : Port 1 pull-up or pull-down bits
bits : 2 - 3 (2 bit)

PUD2 : Port 2 pull-up or pull-down bits
bits : 4 - 5 (2 bit)

PUD3 : Port 3 pull-up or pull-down bits
bits : 6 - 7 (2 bit)

PUD4 : Port 4 pull-up or pull-down bits
bits : 8 - 9 (2 bit)

PUD5 : Port 5 pull-up or pull-down bits
bits : 10 - 11 (2 bit)

PUD6 : Port 6 pull-up or pull-down bits
bits : 12 - 13 (2 bit)

PUD7 : Port 7 pull-up or pull-down bits
bits : 14 - 15 (2 bit)

PUD8 : Port 8 pull-up or pull-down bits
bits : 16 - 17 (2 bit)

PUD9 : Port 9 pull-up or pull-down bits
bits : 18 - 19 (2 bit)

PUD10 : Port 10 pull-up or pull-down bits
bits : 20 - 21 (2 bit)

PUD11 : Port 11 pull-up or pull-down bits
bits : 22 - 23 (2 bit)

PUD12 : Port 12 pull-up or pull-down bits
bits : 24 - 25 (2 bit)

PUD13 : Port 13 pull-up or pull-down bits
bits : 26 - 27 (2 bit)

PUD14 : Port 14 pull-up or pull-down bits
bits : 28 - 29 (2 bit)

PUD15 : Port 15 pull-up or pull-down bits
bits : 30 - 31 (2 bit)



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