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RTC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :

Registers

TIME

PSC

WUT

COSC

ALRM0TD

ALRM1TD

WPK

SS

SHIFTCTL

TTS

DTS

SSTS

HRFC

DATE

TAMP

ALRM0SS

ALRM1SS

BKP0

BKP1

BKP2

BKP3

BKP4

BKP5

BKP6

BKP7

BKP8

BKP9

BKP10

BKP11

CTL

BKP12

BKP13

BKP14

BKP15

BKP16

BKP7 (BKP17)

BKP18

BKP19

STAT


TIME

time register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIME TIME read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCU SCT MNU MNT HRU HRT PM

SCU : Second units in BCD format
bits : 0 - 3 (4 bit)

SCT : Second tens in BCD format
bits : 4 - 6 (3 bit)

MNU : Minute units in BCD format
bits : 8 - 11 (4 bit)

MNT : Minute tens in BCD format
bits : 12 - 14 (3 bit)

HRU : Hour units in BCD format
bits : 16 - 19 (4 bit)

HRT : Hour tens in BCD format
bits : 20 - 21 (2 bit)

PM : AM/PM notation
bits : 22 - 22 (1 bit)


PSC

prescaler register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PSC PSC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FACTOR_S FACTOR_A

FACTOR_S : Synchronous prescaler factor
bits : 0 - 14 (15 bit)

FACTOR_A : Asynchronous prescaler factor
bits : 16 - 22 (7 bit)


WUT

Wakeup timer register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WUT WUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WTRV

WTRV : Auto-wakeup timer reloads value
bits : 0 - 15 (16 bit)


COSC

Coarse calibration register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

COSC COSC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COSS COSD

COSS : Coarse Calibration step
bits : 0 - 4 (5 bit)

COSD : Coarse Calibration direction
bits : 7 - 7 (1 bit)


ALRM0TD

Alarm 0 time and date register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALRM0TD ALRM0TD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCU SCT MSKS MNU MNT MSKM HRU HRT PM MSKH DAYU DAYT DOWS MSKD

SCU : Second units in BCD code.
bits : 0 - 3 (4 bit)

SCT : Second tens in BCD code.
bits : 4 - 6 (3 bit)

MSKS : Alarm seconds mask bit
bits : 7 - 7 (1 bit)

MNU : Minute units in BCD code.
bits : 8 - 11 (4 bit)

MNT : Minute tens in BCD code.
bits : 12 - 14 (3 bit)

MSKM : Alarm minutes mask bit
bits : 15 - 15 (1 bit)

HRU : Hour units in BCD code.
bits : 16 - 19 (4 bit)

HRT : Hour tens in BCD code.
bits : 20 - 21 (2 bit)

PM : AM/PM flag
bits : 22 - 22 (1 bit)

MSKH : Alarm hours mask bit
bits : 23 - 23 (1 bit)

DAYU : Date units or week day in BCD code.
bits : 24 - 27 (4 bit)

DAYT : Date tens in BCD code.
bits : 28 - 29 (2 bit)

DOWS : Day of the week selected
bits : 30 - 30 (1 bit)

MSKD : Alarm date mask bit
bits : 31 - 31 (1 bit)


ALRM1TD

Alarm 1 time and date register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALRM1TD ALRM1TD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCU SCT MSKS MNU MNT MSKM HRU HRT PM MSKH DAYU DAYT DOWS MSKD

SCU : Second units in BCD code.
bits : 0 - 3 (4 bit)

SCT : Second tens in BCD code.
bits : 4 - 6 (3 bit)

MSKS : Alarm seconds mask bit
bits : 7 - 7 (1 bit)

MNU : Minute units in BCD code.
bits : 8 - 11 (4 bit)

MNT : Minute tens in BCD code.
bits : 12 - 14 (3 bit)

MSKM : Alarm minutes mask bit
bits : 15 - 15 (1 bit)

HRU : Hour units in BCD code.
bits : 16 - 19 (4 bit)

HRT : Hour tens in BCD code.
bits : 20 - 21 (2 bit)

PM : AM/PM flag
bits : 22 - 22 (1 bit)

MSKH : Alarm hours mask bit
bits : 23 - 23 (1 bit)

DAYU : Date units or week day in BCD code.
bits : 24 - 27 (4 bit)

DAYT : Date tens in BCD code.
bits : 28 - 29 (2 bit)

DOWS : Day of the week selected
bits : 30 - 30 (1 bit)

MSKD : Alarm date mask bit
bits : 31 - 31 (1 bit)


WPK

write protection register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

WPK WPK write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WPK

WPK : Write protection key
bits : 0 - 7 (8 bit)


SS

sub second register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

SS SS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SSC

SSC : Sub second value
bits : 0 - 15 (16 bit)


SHIFTCTL

shift function control register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

SHIFTCTL SHIFTCTL write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SFS A1S

SFS : Subtract a fraction of a second
bits : 0 - 14 (15 bit)

A1S : One second add
bits : 31 - 31 (1 bit)


TTS

Time of time stamp register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

TTS TTS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCU SCT MNU MNT HRU HRT PM

SCU : Second units in BCD code.
bits : 0 - 3 (4 bit)

SCT : Second tens in BCD code.
bits : 4 - 6 (3 bit)

MNU : Minute units in BCD code.
bits : 8 - 11 (4 bit)

MNT : Minute tens in BCD code.
bits : 12 - 14 (3 bit)

HRU : Hour units in BCD code.
bits : 16 - 19 (4 bit)

HRT : Hour tens in BCD code.
bits : 20 - 21 (2 bit)

PM : AM/PM mark
bits : 22 - 22 (1 bit)


DTS

Date of time stamp register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

DTS DTS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAYU DAYT MONU MONT DOW

DAYU : Date units in BCD format
bits : 0 - 3 (4 bit)

DAYT : Date tens in BCD format
bits : 4 - 5 (2 bit)

MONU : Month units in BCD format
bits : 8 - 11 (4 bit)

MONT : Month tens in BCD format
bits : 12 - 12 (1 bit)

DOW : Week day units
bits : 13 - 15 (3 bit)


SSTS

Sub second of time stamp register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

SSTS SSTS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SSC

SSC : Sub second value
bits : 0 - 15 (16 bit)


HRFC

calibration register
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HRFC HRFC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMSK CWND16 CWND8 FREQI

CMSK : Calibration mask number
bits : 0 - 8 (9 bit)

CWND16 : Frequency compensation window 16 second selected
bits : 13 - 13 (1 bit)

CWND8 : Frequency compensation window 8 second selected
bits : 14 - 14 (1 bit)

FREQI : Increase RTC frequency by 488.5PPM
bits : 15 - 15 (1 bit)


DATE

date register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATE DATE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAYU DAYT MONU MONT DOW YRU YRT

DAYU : Date units in BCD code
bits : 0 - 3 (4 bit)

DAYT : Date tens in BCD code
bits : 4 - 5 (2 bit)

MONU : Month units in BCD code
bits : 8 - 11 (4 bit)

MONT : Month tens in BCD code
bits : 12 - 12 (1 bit)

DOW : Days of the week
bits : 13 - 15 (3 bit)

YRU : Year units in BCD code
bits : 16 - 19 (4 bit)

YRT : Year tens in BCD code
bits : 20 - 23 (4 bit)


TAMP

tamper and alternate function configuration register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TAMP TAMP read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TP0EN TP0EG TPIE TP1EN TP1EG TPTS FREQ FLT PRCH DISPU TP0SEL TSSEL AOT

TP0EN : Tamper 0 detection enable
bits : 0 - 0 (1 bit)

TP0EG : Tamper 0 event trigger edge
bits : 1 - 1 (1 bit)

TPIE : Tamper detection interrupt enable
bits : 2 - 2 (1 bit)

TP1EN : Tamper 1 detection enable
bits : 3 - 3 (1 bit)

TP1EG : Tamper 1 event trigger edge
bits : 4 - 4 (1 bit)

TPTS : Make tamper function used for timestamp function
bits : 7 - 7 (1 bit)

FREQ : Sampling frequency of tamper event detection
bits : 8 - 10 (3 bit)

FLT : RTC_TAMPx filter count setting
bits : 11 - 12 (2 bit)

PRCH : Pre-charge duration time of RTC_TAMPx
bits : 13 - 14 (2 bit)

DISPU : RTC_TAMPx pull-up disable
bits : 15 - 15 (1 bit)

TP0SEL : Tamper 0 function input mapping selection
bits : 16 - 16 (1 bit)

TSSEL : Timestamp input mapping selection
bits : 17 - 17 (1 bit)

AOT : RTC_ALARM Output Type
bits : 18 - 18 (1 bit)


ALRM0SS

alarm A sub second register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALRM0SS ALRM0SS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SSC MSKSSC

SSC : Alarm sub second value
bits : 0 - 14 (15 bit)

MSKSSC : Mask control bit of SSC
bits : 24 - 27 (4 bit)


ALRM1SS

Alarm 1 sub second register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALRM1SS ALRM1SS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SSC MSKSSC

SSC : Alarm sub second value
bits : 0 - 14 (15 bit)

MSKSSC : Mask control bit of SSC
bits : 24 - 27 (4 bit)


BKP0

backup register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP0 BKP0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : BKP
bits : 0 - 31 (32 bit)


BKP1

backup register
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP1 BKP1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Data
bits : 0 - 31 (32 bit)


BKP2

backup register
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP2 BKP2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Data
bits : 0 - 31 (32 bit)


BKP3

backup register
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP3 BKP3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Data
bits : 0 - 31 (32 bit)


BKP4

backup register
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP4 BKP4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Data
bits : 0 - 31 (32 bit)


BKP5

backup register
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP5 BKP5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Data
bits : 0 - 31 (32 bit)


BKP6

backup register
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP6 BKP6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Data
bits : 0 - 31 (32 bit)


BKP7

backup register
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP7 BKP7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Data
bits : 0 - 31 (32 bit)


BKP8

backup register
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP8 BKP8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Data
bits : 0 - 31 (32 bit)


BKP9

backup register
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP9 BKP9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Data
bits : 0 - 31 (32 bit)


BKP10

backup register
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP10 BKP10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Data
bits : 0 - 31 (32 bit)


BKP11

backup register
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP11 BKP11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Data
bits : 0 - 31 (32 bit)


CTL

control register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTL CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WTCS TSEG REFEN BPSHAD CS CCEN ALRM0EN ALRM1EN WTEN TSEN ALRM0IE ALRM1IE WTIE TSIE A1H S1H DSM COS OPOL OS COEN

WTCS : Auto-wakeup timer clock selection
bits : 0 - 2 (3 bit)
access : read-write

TSEG : Valid event edge of time-stamp
bits : 3 - 3 (1 bit)
access : read-write

REFEN : Reference clock detection function enable enable (50 or 60 Hz)
bits : 4 - 4 (1 bit)
access : read-write

BPSHAD : Shadow registers bypass control
bits : 5 - 5 (1 bit)
access : read-write

CS : Clock System
bits : 6 - 6 (1 bit)
access : read-write

CCEN : Coarse calibration function enable
bits : 7 - 7 (1 bit)
access : read-write

ALRM0EN : Alarm-0 function enable
bits : 8 - 8 (1 bit)
access : read-write

ALRM1EN : Alarm-1 function enable
bits : 9 - 9 (1 bit)
access : read-write

WTEN : Auto-wakeup timer function enable
bits : 10 - 10 (1 bit)
access : read-write

TSEN : Time-stamp function enable
bits : 11 - 11 (1 bit)
access : read-write

ALRM0IE : RTC alarm-0 interrupt enable
bits : 12 - 12 (1 bit)
access : read-write

ALRM1IE : RTC alarm-1 interrupt enable
bits : 13 - 13 (1 bit)
access : read-write

WTIE : Auto-wakeup timer interrupt enable
bits : 14 - 14 (1 bit)
access : read-write

TSIE : Time-stamp interrupt enable
bits : 15 - 15 (1 bit)
access : read-write

A1H : Add 1 hour (summer time change)
bits : 16 - 16 (1 bit)
access : write-only

S1H : Subtract 1 hour (winter time change)
bits : 17 - 17 (1 bit)
access : write-only

DSM : Daylight saving mark
bits : 18 - 18 (1 bit)
access : read-write

COS : Calibration output selection
bits : 19 - 19 (1 bit)
access : read-write

OPOL : Output polarity
bits : 20 - 20 (1 bit)
access : read-write

OS : Output selection
bits : 21 - 22 (2 bit)
access : read-write

COEN : Calibration output enable
bits : 23 - 23 (1 bit)
access : read-write


BKP12

backup register
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP12 BKP12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Data
bits : 0 - 31 (32 bit)


BKP13

backup register
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP13 BKP13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Data
bits : 0 - 31 (32 bit)


BKP14

backup register
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP14 BKP14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Data
bits : 0 - 31 (32 bit)


BKP15

backup register
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP15 BKP15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Data
bits : 0 - 31 (32 bit)


BKP16

backup register
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP16 BKP16 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Data
bits : 0 - 31 (32 bit)


BKP7 (BKP17)

backup register
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP7 BKP7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Data
bits : 0 - 31 (32 bit)


BKP18

backup register
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP18 BKP18 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Data
bits : 0 - 31 (32 bit)


BKP19

backup register
address_offset : 0x9C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP19 BKP19 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Data
bits : 0 - 31 (32 bit)


STAT

status register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

STAT STAT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ALRM0WF ALRM1WF WTWF SOPF YCM RSYNF INITF INITM ALRM0F ALRM1F WTF TSF TSOVRF TP0F TP1F SCPF

ALRM0WF : Alarm 0 configuration can be write flag
bits : 0 - 0 (1 bit)
access : read-only

ALRM1WF : Alarm 1 configuration can be write flag
bits : 1 - 1 (1 bit)
access : read-only

WTWF : Wakeup timer write enable flag
bits : 2 - 2 (1 bit)
access : read-only

SOPF : Shift function operation pending flag
bits : 3 - 3 (1 bit)
access : read-write

YCM : Year configuration mark
bits : 4 - 4 (1 bit)
access : read-only

RSYNF : Register synchronization flag
bits : 5 - 5 (1 bit)
access : read-write

INITF : Initialization state flag
bits : 6 - 6 (1 bit)
access : read-only

INITM : Enter initialization mode
bits : 7 - 7 (1 bit)
access : read-write

ALRM0F : Alarm-0 occurs flag
bits : 8 - 8 (1 bit)
access : read-write

ALRM1F : Alarm-1 occurs flag
bits : 9 - 9 (1 bit)
access : read-write

WTF : Wakeup timer flag
bits : 10 - 10 (1 bit)
access : read-write

TSF : Time-stamp flag
bits : 11 - 11 (1 bit)
access : read-write

TSOVRF : Time-stamp overflow flag
bits : 12 - 12 (1 bit)
access : read-write

TP0F : RTC_TAMP0 detected flag
bits : 13 - 13 (1 bit)
access : read-write

TP1F : RTC_TAMP1 detected flag
bits : 14 - 14 (1 bit)
access : read-write

SCPF : Smooth calibration pending flag
bits : 16 - 16 (1 bit)
access : read-only



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