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USB_HS

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :

Registers

DCFG

DIEPINTEN

DIEP0CTL

DIEP0INTF

DIEP0LEN

DIEP0DMAADDR

DIEP0TFSTAT

DIEP1CTL

DIEP1INTF

DIEP1LEN

DIEP1DMAADDR

DIEP1TFSTAT

DOEPINTEN

DIEP2CTL

DIEP2INTF

DIEP2LEN

DIEP2DMAADDR

DIEP2TFSTAT

DIEP3CTL

DIEP3INTF

DIEP3LEN

DIEP3DMAADDR

DIEP3TFSTAT

DAEPINT

DIEP4CTL

DIEP4INTF

DIEP4LEN

DIEP4DMAADDR

DIEP4TFSTAT

DIEP5CTL

DIEP5INTF

DIEP5LEN

DIEP5DMAADDR

DIEP5TFSTAT

DAEPINTEN

DVBUSDT

DVBUSPT

DOEP0CTL

DOEP0INTF

DOEP0LEN

DOEP0DMAADDR

DOEP1CTL

DOEP1INTF

DOEP1LEN

DOEP1DMAADDR

DIEPFEINTEN

DOEP2CTL

DOEP2INTF

DOEP2LEN

DOEP2DMAADDR

DOEP3CTL

DOEP3INTF

DOEP3LEN

DOEP3DMAADDR

DEP1INT

DOEP4CTL

DOEP4INTF

DOEP4LEN

DOEP4DMAADDR

DOEP5CTL

DOEP5INTF

DOEP5LEN

DOEP5DMAADDR

DEP1INTEN

DCTL

DIEP1INTEN

DSTAT

DOEP1INTEN


DCFG

device configuration register (DCFG)
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DCFG DCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DS NZLSOH DAR EOPFT

DS : Device speed
bits : 0 - 1 (2 bit)

NZLSOH : Non-zero-length status OUT handshake
bits : 2 - 2 (1 bit)

DAR : Device address
bits : 4 - 10 (7 bit)

EOPFT : end of periodic frame time
bits : 11 - 12 (2 bit)


DIEPINTEN

device IN endpoint common interrupt mask register (DIEPINTEN)
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEPINTEN DIEPINTEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TFEN EPDISEN CITOEN EPTXFUDEN IEPNEEN TXFEEN NAKEN

TFEN : Transfer completed interrupt enable
bits : 0 - 0 (1 bit)

EPDISEN : Endpoint disabled interrupt enable
bits : 1 - 1 (1 bit)

CITOEN : Control IN timeout condition interrupt enable (Non-isochronous endpoints)
bits : 3 - 3 (1 bit)

EPTXFUDEN : Endpoint Tx FIFO underrun interrupt enable bit
bits : 4 - 4 (1 bit)

IEPNEEN : IN endpoint NAK effective interrupt enable
bits : 6 - 6 (1 bit)

TXFEEN : Trabsmit FIFO empty interrupt enable
bits : 7 - 7 (1 bit)

NAKEN : NAK handshake sent by USBHS interrupt enable bit
bits : 13 - 13 (1 bit)


DIEP0CTL

Device IN endpoint 0 control register (USBHS_DIEP0CTL)
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEP0CTL DIEP0CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MPL EPACT NAKS EPTYPE STALL TXFNUM CNAK SNAK EPD EPEN

MPL : Maximum packet length
bits : 0 - 1 (2 bit)
access : read-write

EPACT : endpoint active
bits : 15 - 15 (1 bit)
access : read-only

NAKS : NAK status
bits : 17 - 17 (1 bit)
access : read-only

EPTYPE : Endpoint type
bits : 18 - 19 (2 bit)
access : read-only

STALL : STALL handshake
bits : 21 - 21 (1 bit)
access : read-write

TXFNUM : TxFIFO number
bits : 22 - 25 (4 bit)
access : read-write

CNAK : Clear NAK
bits : 26 - 26 (1 bit)
access : write-only

SNAK : Set NAK
bits : 27 - 27 (1 bit)
access : write-only

EPD : Endpoint disable
bits : 30 - 30 (1 bit)
access : read-only

EPEN : Endpoint enable
bits : 31 - 31 (1 bit)
access : read-only


DIEP0INTF

Device IN endpoint-0 interrupt register
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEP0INTF DIEP0INTF read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TF EPDIS CITO EPTXFUD IEPNE TXFE NAK

TF : Transfer finished
bits : 0 - 0 (1 bit)
access : read-write

EPDIS : Endpoint finished
bits : 1 - 1 (1 bit)
access : read-write

CITO : Control in timeout interrupt
bits : 3 - 3 (1 bit)
access : read-write

EPTXFUD : Endpoint Tx FIFO underrun
bits : 4 - 4 (1 bit)
access : read-write

IEPNE : IN endpoint NAK effective
bits : 6 - 6 (1 bit)
access : read-write

TXFE : Transmit FIFO empty
bits : 7 - 7 (1 bit)
access : read-only

NAK : NAK handshake sent by USBHS
bits : 13 - 13 (1 bit)
access : read-write


DIEP0LEN

device IN endpoint-0 transfer length register
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEP0LEN DIEP0LEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TLEN PCNT

TLEN : Transfer length
bits : 0 - 6 (7 bit)

PCNT : Packet count
bits : 19 - 20 (2 bit)


DIEP0DMAADDR

device IN endpoint 0 DMA address register
address_offset : 0x114 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEP0DMAADDR DIEP0DMAADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DMAADDR

DMAADDR : DMA address
bits : 0 - 31 (32 bit)


DIEP0TFSTAT

device IN endpoint 0 transmit FIFO status register
address_offset : 0x118 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

DIEP0TFSTAT DIEP0TFSTAT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IEPTFS

IEPTFS : IN endpoint TxFIFO space available
bits : 0 - 15 (16 bit)


DIEP1CTL

Device IN endpoint-x control register
address_offset : 0x120 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEP1CTL DIEP1CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MPL EPACT EOFRM_DPID NAKS EPTYPE STALL TXFNUM CNAK SNAK SD0PID_SEVENFRM SD1PID_SODDFRM EPD EPEN

MPL : maximum packet length
bits : 0 - 10 (11 bit)
access : read-write

EPACT : Endpoint active
bits : 15 - 15 (1 bit)
access : read-write

EOFRM_DPID : EOFRM/DPID
bits : 16 - 16 (1 bit)
access : read-only

NAKS : NAK status
bits : 17 - 17 (1 bit)
access : read-only

EPTYPE : Endpoint type
bits : 18 - 19 (2 bit)
access : read-write

STALL : STALL handshake
bits : 21 - 21 (1 bit)
access : read-write

TXFNUM : Tx FIFO number
bits : 22 - 25 (4 bit)
access : read-write

CNAK : Clear NAK
bits : 26 - 26 (1 bit)
access : write-only

SNAK : Set NAK
bits : 27 - 27 (1 bit)
access : write-only

SD0PID_SEVENFRM : SD0PID/SEVNFRM
bits : 28 - 28 (1 bit)
access : write-only

SD1PID_SODDFRM : Set DATA1 PID/Set odd frame
bits : 29 - 29 (1 bit)
access : write-only

EPD : Endpoint disable
bits : 30 - 30 (1 bit)
access : read-write

EPEN : Endpoint enable
bits : 31 - 31 (1 bit)
access : read-write


DIEP1INTF

Device IN endpoint-1 interrupt register
address_offset : 0x128 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEP1INTF DIEP1INTF read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TF EPDIS CITO EPTXFUD IEPNE TXFE NAK

TF : Transfer finished
bits : 0 - 0 (1 bit)
access : read-write

EPDIS : Endpoint finished
bits : 1 - 1 (1 bit)
access : read-write

CITO : Control in timeout interrupt
bits : 3 - 3 (1 bit)
access : read-write

EPTXFUD : Endpoint Tx FIFO underrun
bits : 4 - 4 (1 bit)
access : read-write

IEPNE : IN endpoint NAK effective
bits : 6 - 6 (1 bit)
access : read-write

TXFE : Transmit FIFO empty
bits : 7 - 7 (1 bit)
access : read-only

NAK : NAK handshake sent by USBHS
bits : 13 - 13 (1 bit)
access : read-write


DIEP1LEN

device IN endpoint-1 transfer length register
address_offset : 0x130 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEP1LEN DIEP1LEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TLEN PCNT MCNT

TLEN : Transfer length
bits : 0 - 18 (19 bit)

PCNT : Packet count
bits : 19 - 28 (10 bit)

MCNT : Multi count
bits : 29 - 30 (2 bit)


DIEP1DMAADDR

device IN endpoint 1 DMA address register
address_offset : 0x134 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEP1DMAADDR DIEP1DMAADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DMAADDR

DMAADDR : DMA address
bits : 0 - 31 (32 bit)


DIEP1TFSTAT

device IN endpoint 1 transmit FIFO status register
address_offset : 0x138 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

DIEP1TFSTAT DIEP1TFSTAT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IEPTFS

IEPTFS : IN endpoint TxFIFO space available
bits : 0 - 15 (16 bit)


DOEPINTEN

device OUT endpoint common interrupt enable register (DOEPINTEN)
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOEPINTEN DOEPINTEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TFEN EPDISEN STPFEN EPRXFOVREN BTBSTPEN NYETEN

TFEN : Transfer completed interrupt enable
bits : 0 - 0 (1 bit)

EPDISEN : Endpoint disabled interrupt enable
bits : 1 - 1 (1 bit)

STPFEN : SETUP phase done interrupt enable
bits : 3 - 3 (1 bit)

EPRXFOVREN : Endpoint Rx FIFO overrun interrupt enable
bits : 4 - 4 (1 bit)

BTBSTPEN : Back-to-back SETUP packets ( Only for control OUT endpoint) interrupt enable bit
bits : 6 - 6 (1 bit)

NYETEN : NYET handshake is sent interrupt enable
bits : 14 - 14 (1 bit)


DIEP2CTL

device endpoint-2 control register
address_offset : 0x140 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEP2CTL DIEP2CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MPL EPACT EOFRM_DPID NAKS EPTYPE STALL TXFNUM CNAK SNAK SD0PID_SEVENFRM SD1PID_SODDFRM EPD EPEN

MPL : maximum packet length
bits : 0 - 10 (11 bit)
access : read-write

EPACT : Endpoint active
bits : 15 - 15 (1 bit)
access : read-write

EOFRM_DPID : EOFRM/DPID
bits : 16 - 16 (1 bit)
access : read-only

NAKS : NAK status
bits : 17 - 17 (1 bit)
access : read-only

EPTYPE : Endpoint type
bits : 18 - 19 (2 bit)
access : read-write

STALL : STALL handshake
bits : 21 - 21 (1 bit)
access : read-write

TXFNUM : Tx FIFO number
bits : 22 - 25 (4 bit)
access : read-write

CNAK : Clear NAK
bits : 26 - 26 (1 bit)
access : write-only

SNAK : Set NAK
bits : 27 - 27 (1 bit)
access : write-only

SD0PID_SEVENFRM : SD0PID/SEVNFRM
bits : 28 - 28 (1 bit)
access : write-only

SD1PID_SODDFRM : Set DATA1 PID/Set odd frame
bits : 29 - 29 (1 bit)
access : write-only

EPD : Endpoint disable
bits : 30 - 30 (1 bit)
access : read-write

EPEN : Endpoint enable
bits : 31 - 31 (1 bit)
access : read-write


DIEP2INTF

Device IN endpoint-2 interrupt register
address_offset : 0x148 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEP2INTF DIEP2INTF read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TF EPDIS CITO EPTXFUD IEPNE TXFE NAK

TF : Transfer finished
bits : 0 - 0 (1 bit)
access : read-write

EPDIS : Endpoint finished
bits : 1 - 1 (1 bit)
access : read-write

CITO : Control in timeout interrupt
bits : 3 - 3 (1 bit)
access : read-write

EPTXFUD : Endpoint Tx FIFO underrun
bits : 4 - 4 (1 bit)
access : read-write

IEPNE : IN endpoint NAK effective
bits : 6 - 6 (1 bit)
access : read-write

TXFE : Transmit FIFO empty
bits : 7 - 7 (1 bit)
access : read-only

NAK : NAK handshake sent by USBHS
bits : 13 - 13 (1 bit)
access : read-write


DIEP2LEN

device IN endpoint-2 transfer length register
address_offset : 0x150 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEP2LEN DIEP2LEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TLEN PCNT MCNT

TLEN : Transfer length
bits : 0 - 18 (19 bit)

PCNT : Packet count
bits : 19 - 28 (10 bit)

MCNT : Multi count
bits : 29 - 30 (2 bit)


DIEP2DMAADDR

device IN endpoint 2 DMA address register
address_offset : 0x154 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEP2DMAADDR DIEP2DMAADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DMAADDR

DMAADDR : DMA address
bits : 0 - 31 (32 bit)


DIEP2TFSTAT

device IN endpoint 2 transmit FIFO status register
address_offset : 0x158 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

DIEP2TFSTAT DIEP2TFSTAT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IEPTFS

IEPTFS : IN endpoint TxFIFO space available
bits : 0 - 15 (16 bit)


DIEP3CTL

device endpoint-3 control register
address_offset : 0x160 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEP3CTL DIEP3CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MPL EPACT EOFRM_DPID NAKS EPTYPE STALL TXFNUM CNAK SNAK SD0PID_SEVENFRM SD1PID_SODDFRM EPD EPEN

MPL : maximum packet length
bits : 0 - 10 (11 bit)
access : read-write

EPACT : Endpoint active
bits : 15 - 15 (1 bit)
access : read-write

EOFRM_DPID : EOFRM/DPID
bits : 16 - 16 (1 bit)
access : read-only

NAKS : NAK status
bits : 17 - 17 (1 bit)
access : read-only

EPTYPE : Endpoint type
bits : 18 - 19 (2 bit)
access : read-write

STALL : STALL handshake
bits : 21 - 21 (1 bit)
access : read-write

TXFNUM : Tx FIFO number
bits : 22 - 25 (4 bit)
access : read-write

CNAK : Clear NAK
bits : 26 - 26 (1 bit)
access : write-only

SNAK : Set NAK
bits : 27 - 27 (1 bit)
access : write-only

SD0PID_SEVENFRM : SD0PID/SEVNFRM
bits : 28 - 28 (1 bit)
access : write-only

SD1PID_SODDFRM : Set DATA1 PID/Set odd frame
bits : 29 - 29 (1 bit)
access : write-only

EPD : Endpoint disable
bits : 30 - 30 (1 bit)
access : read-write

EPEN : Endpoint enable
bits : 31 - 31 (1 bit)
access : read-write


DIEP3INTF

Device IN endpoint-3 interrupt register
address_offset : 0x168 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEP3INTF DIEP3INTF read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TF EPDIS CITO EPTXFUD IEPNE TXFE NAK

TF : Transfer finished
bits : 0 - 0 (1 bit)
access : read-write

EPDIS : Endpoint finished
bits : 1 - 1 (1 bit)
access : read-write

CITO : Control in timeout interrupt
bits : 3 - 3 (1 bit)
access : read-write

EPTXFUD : Endpoint Tx FIFO underrun
bits : 4 - 4 (1 bit)
access : read-write

IEPNE : IN endpoint NAK effective
bits : 6 - 6 (1 bit)
access : read-write

TXFE : Transmit FIFO empty
bits : 7 - 7 (1 bit)
access : read-only

NAK : NAK handshake sent by USBHS
bits : 13 - 13 (1 bit)
access : read-write


DIEP3LEN

device IN endpoint-3 transfer length register
address_offset : 0x170 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEP3LEN DIEP3LEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TLEN PCNT MCNT

TLEN : Transfer length
bits : 0 - 18 (19 bit)

PCNT : Packet count
bits : 19 - 28 (10 bit)

MCNT : Multi count
bits : 29 - 30 (2 bit)


DIEP3DMAADDR

device IN endpoint 3 DMA address register
address_offset : 0x174 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEP3DMAADDR DIEP3DMAADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DMAADDR

DMAADDR : DMA address
bits : 0 - 31 (32 bit)


DIEP3TFSTAT

device IN endpoint 3 transmit FIFO status register
address_offset : 0x178 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

DIEP3TFSTAT DIEP3TFSTAT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IEPTFS

IEPTFS : IN endpoint TxFIFO space available
bits : 0 - 15 (16 bit)


DAEPINT

device all endpoints interrupt register (DAEPINT)
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

DAEPINT DAEPINT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IEPITB OEPITB

IEPITB : Device all IN endpoint interrupt bits
bits : 0 - 5 (6 bit)

OEPITB : Device all OUT endpoint interrupt bits
bits : 16 - 21 (6 bit)


DIEP4CTL

device endpoint-4 control register
address_offset : 0x180 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEP4CTL DIEP4CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MPL EPACT EOFRM_DPID NAKS EPTYPE STALL TXFNUM CNAK SNAK SD0PID_SEVENFRM SD1PID_SODDFRM EPD EPEN

MPL : maximum packet length
bits : 0 - 10 (11 bit)
access : read-write

EPACT : Endpoint active
bits : 15 - 15 (1 bit)
access : read-write

EOFRM_DPID : EOFRM/DPID
bits : 16 - 16 (1 bit)
access : read-only

NAKS : NAK status
bits : 17 - 17 (1 bit)
access : read-only

EPTYPE : Endpoint type
bits : 18 - 19 (2 bit)
access : read-write

STALL : STALL handshake
bits : 21 - 21 (1 bit)
access : read-write

TXFNUM : Tx FIFO number
bits : 22 - 25 (4 bit)
access : read-write

CNAK : Clear NAK
bits : 26 - 26 (1 bit)
access : write-only

SNAK : Set NAK
bits : 27 - 27 (1 bit)
access : write-only

SD0PID_SEVENFRM : SD0PID/SEVNFRM
bits : 28 - 28 (1 bit)
access : write-only

SD1PID_SODDFRM : Set DATA1 PID/Set odd frame
bits : 29 - 29 (1 bit)
access : write-only

EPD : Endpoint disable
bits : 30 - 30 (1 bit)
access : read-write

EPEN : Endpoint enable
bits : 31 - 31 (1 bit)
access : read-write


DIEP4INTF

Device IN endpoint-4 interrupt register
address_offset : 0x188 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEP4INTF DIEP4INTF read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TF EPDIS CITO EPTXFUD IEPNE TXFE NAK

TF : Transfer finished
bits : 0 - 0 (1 bit)
access : read-write

EPDIS : Endpoint finished
bits : 1 - 1 (1 bit)
access : read-write

CITO : Control in timeout interrupt
bits : 3 - 3 (1 bit)
access : read-write

EPTXFUD : Endpoint Tx FIFO underrun
bits : 4 - 4 (1 bit)
access : read-write

IEPNE : IN endpoint NAK effective
bits : 6 - 6 (1 bit)
access : read-write

TXFE : Transmit FIFO empty
bits : 7 - 7 (1 bit)
access : read-only

NAK : NAK handshake sent by USBHS
bits : 13 - 13 (1 bit)
access : read-write


DIEP4LEN

device IN endpoint-4 transfer length register
address_offset : 0x190 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEP4LEN DIEP4LEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TLEN PCNT MCNT

TLEN : Transfer length
bits : 0 - 18 (19 bit)

PCNT : Packet count
bits : 19 - 28 (10 bit)

MCNT : Multi count
bits : 29 - 30 (2 bit)


DIEP4DMAADDR

device IN endpoint 4 DMA address register
address_offset : 0x194 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEP4DMAADDR DIEP4DMAADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DMAADDR

DMAADDR : DMA address
bits : 0 - 31 (32 bit)


DIEP4TFSTAT

device IN endpoint 4 transmit FIFO status register
address_offset : 0x198 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

DIEP4TFSTAT DIEP4TFSTAT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IEPTFS

IEPTFS : IN endpoint TxFIFO space available
bits : 0 - 15 (16 bit)


DIEP5CTL

device endpoint-5 control register
address_offset : 0x1A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEP5CTL DIEP5CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MPL EPACT EOFRM_DPID NAKS EPTYPE STALL TXFNUM CNAK SNAK SD0PID_SEVENFRM SD1PID_SODDFRM EPD EPEN

MPL : maximum packet length
bits : 0 - 10 (11 bit)
access : read-write

EPACT : Endpoint active
bits : 15 - 15 (1 bit)
access : read-write

EOFRM_DPID : EOFRM/DPID
bits : 16 - 16 (1 bit)
access : read-only

NAKS : NAK status
bits : 17 - 17 (1 bit)
access : read-only

EPTYPE : Endpoint type
bits : 18 - 19 (2 bit)
access : read-write

STALL : STALL handshake
bits : 21 - 21 (1 bit)
access : read-write

TXFNUM : Tx FIFO number
bits : 22 - 25 (4 bit)
access : read-write

CNAK : Clear NAK
bits : 26 - 26 (1 bit)
access : write-only

SNAK : Set NAK
bits : 27 - 27 (1 bit)
access : write-only

SD0PID_SEVENFRM : SD0PID/SEVNFRM
bits : 28 - 28 (1 bit)
access : write-only

SD1PID_SODDFRM : Set DATA1 PID/Set odd frame
bits : 29 - 29 (1 bit)
access : write-only

EPD : Endpoint disable
bits : 30 - 30 (1 bit)
access : read-write

EPEN : Endpoint enable
bits : 31 - 31 (1 bit)
access : read-write


DIEP5INTF

Device IN endpoint-5 interrupt register
address_offset : 0x1A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEP5INTF DIEP5INTF read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TF EPDIS CITO EPTXFUD IEPNE TXFE NAK

TF : Transfer finished
bits : 0 - 0 (1 bit)
access : read-write

EPDIS : Endpoint finished
bits : 1 - 1 (1 bit)
access : read-write

CITO : Control in timeout interrupt
bits : 3 - 3 (1 bit)
access : read-write

EPTXFUD : Endpoint Tx FIFO underrun
bits : 4 - 4 (1 bit)
access : read-write

IEPNE : IN endpoint NAK effective
bits : 6 - 6 (1 bit)
access : read-write

TXFE : Transmit FIFO empty
bits : 7 - 7 (1 bit)
access : read-only

NAK : NAK handshake sent by USBHS
bits : 13 - 13 (1 bit)
access : read-write


DIEP5LEN

device IN endpoint-5 transfer length register
address_offset : 0x1B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEP5LEN DIEP5LEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TLEN PCNT MCNT

TLEN : Transfer length
bits : 0 - 18 (19 bit)

PCNT : Packet count
bits : 19 - 28 (10 bit)

MCNT : Multi count
bits : 29 - 30 (2 bit)


DIEP5DMAADDR

device IN endpoint 5 DMA address register
address_offset : 0x1B4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEP5DMAADDR DIEP5DMAADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DMAADDR

DMAADDR : DMA address
bits : 0 - 31 (32 bit)


DIEP5TFSTAT

device IN endpoint 5 transmit FIFO status register
address_offset : 0x1B8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

DIEP5TFSTAT DIEP5TFSTAT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IEPTFS

IEPTFS : IN endpoint TxFIFO space available
bits : 0 - 15 (16 bit)


DAEPINTEN

Device all endpoints interrupt enable register (DAEPINTEN)
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAEPINTEN DAEPINTEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IEPIE OEPIE

IEPIE : IN endpoint interrupt enable bits
bits : 0 - 5 (6 bit)

OEPIE : OUT endpoint interrupt enable bits
bits : 16 - 21 (6 bit)


DVBUSDT

device VBUS discharge time register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DVBUSDT DVBUSDT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DVBUSDT

DVBUSDT : Device VBUS discharge time
bits : 0 - 15 (16 bit)


DVBUSPT

device VBUS pulsing time register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DVBUSPT DVBUSPT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DVBUSPT

DVBUSPT : Device VBUS pulsing time
bits : 0 - 11 (12 bit)


DOEP0CTL

Device OUT endpoint-0 control register
address_offset : 0x300 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOEP0CTL DOEP0CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MPL EPACT NAKS EPTYPE SNOOP STALL CNAK SNAK EPD EPEN

MPL : Maximum packet length
bits : 0 - 1 (2 bit)
access : read-only

EPACT : Endpoint active
bits : 15 - 15 (1 bit)
access : read-only

NAKS : NAK status
bits : 17 - 17 (1 bit)
access : read-only

EPTYPE : Endpoint type
bits : 18 - 19 (2 bit)
access : read-only

SNOOP : Snoop mode
bits : 20 - 20 (1 bit)
access : read-write

STALL : STALL handshake
bits : 21 - 21 (1 bit)
access : read-write

CNAK : Clear NAK
bits : 26 - 26 (1 bit)
access : write-only

SNAK : Set NAK
bits : 27 - 27 (1 bit)
access : write-only

EPD : Endpoint disable
bits : 30 - 30 (1 bit)
access : read-only

EPEN : Endpoint enable
bits : 31 - 31 (1 bit)
access : write-only


DOEP0INTF

device out endpoint-0 interrupt register
address_offset : 0x308 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOEP0INTF DOEP0INTF read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TF EPDIS STPF EPRXFOVR BTBSTP NYET

TF : Transfer finished
bits : 0 - 0 (1 bit)

EPDIS : Endpoint disabled
bits : 1 - 1 (1 bit)

STPF : Setup phase finished
bits : 3 - 3 (1 bit)

EPRXFOVR : Endpoint Rx FIFO overrun
bits : 4 - 4 (1 bit)

BTBSTP : Back-to-back SETUP packets
bits : 6 - 6 (1 bit)

NYET : NYET handshake is sent
bits : 14 - 14 (1 bit)


DOEP0LEN

device OUT endpoint-0 transfer length register
address_offset : 0x310 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOEP0LEN DOEP0LEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TLEN PCNT STPCNT

TLEN : Transfer length
bits : 0 - 6 (7 bit)

PCNT : Packet count
bits : 19 - 19 (1 bit)

STPCNT : SETUP packet count
bits : 29 - 30 (2 bit)


DOEP0DMAADDR

device OUT endpoint 0 DMA address register
address_offset : 0x314 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOEP0DMAADDR DOEP0DMAADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DMAADDR

DMAADDR : DMA address
bits : 0 - 31 (32 bit)


DOEP1CTL

Device OUT endpoint-1 control register
address_offset : 0x320 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOEP1CTL DOEP1CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MPL EPACT EOFRM_DPID NAKS EPTYPE SNOOP STALL CNAK SNAK SD0PID_SEVENFRM SD1PID_SODDFRM EPD EPEN

MPL : maximum packet length
bits : 0 - 10 (11 bit)
access : read-write

EPACT : Endpoint active
bits : 15 - 15 (1 bit)
access : read-write

EOFRM_DPID : EOFRM/DPID
bits : 16 - 16 (1 bit)
access : read-only

NAKS : NAK status
bits : 17 - 17 (1 bit)
access : read-only

EPTYPE : Endpoint type
bits : 18 - 19 (2 bit)
access : read-write

SNOOP : Snoop mode
bits : 20 - 20 (1 bit)
access : read-write

STALL : STALL handshake
bits : 21 - 21 (1 bit)
access : read-write

CNAK : Clear NAK
bits : 26 - 26 (1 bit)
access : write-only

SNAK : Set NAK
bits : 27 - 27 (1 bit)
access : write-only

SD0PID_SEVENFRM : SD0PID/SEVENFRM
bits : 28 - 28 (1 bit)
access : write-only

SD1PID_SODDFRM : SD1PID/SODDFRM
bits : 29 - 29 (1 bit)
access : write-only

EPD : Endpoint disable
bits : 30 - 30 (1 bit)
access : read-write

EPEN : Endpoint enable
bits : 31 - 31 (1 bit)
access : read-write


DOEP1INTF

device out endpoint-1 interrupt register
address_offset : 0x328 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOEP1INTF DOEP1INTF read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TF EPDIS STPF EPRXFOVR BTBSTP NYET

TF : Transfer finished
bits : 0 - 0 (1 bit)

EPDIS : Endpoint disabled
bits : 1 - 1 (1 bit)

STPF : Setup phase finished
bits : 3 - 3 (1 bit)

EPRXFOVR : Endpoint Rx FIFO overrun
bits : 4 - 4 (1 bit)

BTBSTP : Back-to-back SETUP packets
bits : 6 - 6 (1 bit)

NYET : NYET handshake is sent
bits : 14 - 14 (1 bit)


DOEP1LEN

device OUT endpoint-1 transfer length register
address_offset : 0x330 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOEP1LEN DOEP1LEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TLEN PCNT STPCNT_RXDPID

TLEN : Transfer length
bits : 0 - 18 (19 bit)

PCNT : Packet count
bits : 19 - 28 (10 bit)

STPCNT_RXDPID : SETUP packet count/Received data PID
bits : 29 - 30 (2 bit)


DOEP1DMAADDR

device OUT endpoint 1 DMA address register
address_offset : 0x334 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOEP1DMAADDR DOEP1DMAADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DMAADDR

DMAADDR : DMA address
bits : 0 - 31 (32 bit)


DIEPFEINTEN

device IN endpoint FIFO empty interrupt enable register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEPFEINTEN DIEPFEINTEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IEPTXFEIE

IEPTXFEIE : IN EP Tx FIFO empty interrupt enable bits
bits : 0 - 5 (6 bit)


DOEP2CTL

Device OUT endpoint-2 control register
address_offset : 0x340 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOEP2CTL DOEP2CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MPL EPACT EOFRM_DPID NAKS EPTYPE SNOOP STALL CNAK SNAK SD0PID_SEVENFRM SD1PID_SODDFRM EPD EPEN

MPL : maximum packet length
bits : 0 - 10 (11 bit)
access : read-write

EPACT : Endpoint active
bits : 15 - 15 (1 bit)
access : read-write

EOFRM_DPID : EOFRM/DPID
bits : 16 - 16 (1 bit)
access : read-only

NAKS : NAK status
bits : 17 - 17 (1 bit)
access : read-only

EPTYPE : Endpoint type
bits : 18 - 19 (2 bit)
access : read-write

SNOOP : Snoop mode
bits : 20 - 20 (1 bit)
access : read-write

STALL : STALL handshake
bits : 21 - 21 (1 bit)
access : read-write

CNAK : Clear NAK
bits : 26 - 26 (1 bit)
access : write-only

SNAK : Set NAK
bits : 27 - 27 (1 bit)
access : write-only

SD0PID_SEVENFRM : SD0PID/SEVENFRM
bits : 28 - 28 (1 bit)
access : write-only

SD1PID_SODDFRM : SD1PID/SODDFRM
bits : 29 - 29 (1 bit)
access : write-only

EPD : Endpoint disable
bits : 30 - 30 (1 bit)
access : read-write

EPEN : Endpoint enable
bits : 31 - 31 (1 bit)
access : read-write


DOEP2INTF

device out endpoint-2 interrupt register
address_offset : 0x348 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOEP2INTF DOEP2INTF read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TF EPDIS STPF EPRXFOVR BTBSTP NYET

TF : Transfer finished
bits : 0 - 0 (1 bit)

EPDIS : Endpoint disabled
bits : 1 - 1 (1 bit)

STPF : Setup phase finished
bits : 3 - 3 (1 bit)

EPRXFOVR : Endpoint Rx FIFO overrun
bits : 4 - 4 (1 bit)

BTBSTP : Back-to-back SETUP packets
bits : 6 - 6 (1 bit)

NYET : NYET handshake is sent
bits : 14 - 14 (1 bit)


DOEP2LEN

device OUT endpoint-2 transfer length register
address_offset : 0x350 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOEP2LEN DOEP2LEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TLEN PCNT STPCNT_RXDPID

TLEN : Transfer length
bits : 0 - 18 (19 bit)

PCNT : Packet count
bits : 19 - 28 (10 bit)

STPCNT_RXDPID : SETUP packet count/Received data PID
bits : 29 - 30 (2 bit)


DOEP2DMAADDR

device OUT endpoint 2 DMA address register
address_offset : 0x354 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOEP2DMAADDR DOEP2DMAADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DMAADDR

DMAADDR : DMA address
bits : 0 - 31 (32 bit)


DOEP3CTL

Device OUT endpoint-3 control register
address_offset : 0x360 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOEP3CTL DOEP3CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MPL EPACT EOFRM_DPID NAKS EPTYPE SNOOP STALL CNAK SNAK SD0PID_SEVENFRM SD1PID_SODDFRM EPD EPEN

MPL : maximum packet length
bits : 0 - 10 (11 bit)
access : read-write

EPACT : Endpoint active
bits : 15 - 15 (1 bit)
access : read-write

EOFRM_DPID : EOFRM/DPID
bits : 16 - 16 (1 bit)
access : read-only

NAKS : NAK status
bits : 17 - 17 (1 bit)
access : read-only

EPTYPE : Endpoint type
bits : 18 - 19 (2 bit)
access : read-write

SNOOP : Snoop mode
bits : 20 - 20 (1 bit)
access : read-write

STALL : STALL handshake
bits : 21 - 21 (1 bit)
access : read-write

CNAK : Clear NAK
bits : 26 - 26 (1 bit)
access : write-only

SNAK : Set NAK
bits : 27 - 27 (1 bit)
access : write-only

SD0PID_SEVENFRM : SD0PID/SEVENFRM
bits : 28 - 28 (1 bit)
access : write-only

SD1PID_SODDFRM : SD1PID/SODDFRM
bits : 29 - 29 (1 bit)
access : write-only

EPD : Endpoint disable
bits : 30 - 30 (1 bit)
access : read-write

EPEN : Endpoint enable
bits : 31 - 31 (1 bit)
access : read-write


DOEP3INTF

device out endpoint-3 interrupt register
address_offset : 0x368 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOEP3INTF DOEP3INTF read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TF EPDIS STPF EPRXFOVR BTBSTP NYET

TF : Transfer finished
bits : 0 - 0 (1 bit)

EPDIS : Endpoint disabled
bits : 1 - 1 (1 bit)

STPF : Setup phase finished
bits : 3 - 3 (1 bit)

EPRXFOVR : Endpoint Rx FIFO overrun
bits : 4 - 4 (1 bit)

BTBSTP : Back-to-back SETUP packets
bits : 6 - 6 (1 bit)

NYET : NYET handshake is sent
bits : 14 - 14 (1 bit)


DOEP3LEN

device OUT endpoint-3 transfer length register
address_offset : 0x370 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOEP3LEN DOEP3LEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TLEN PCNT STPCNT_RXDPID

TLEN : Transfer length
bits : 0 - 18 (19 bit)

PCNT : Packet count
bits : 19 - 28 (10 bit)

STPCNT_RXDPID : SETUP packet count/Received data PID
bits : 29 - 30 (2 bit)


DOEP3DMAADDR

device OUT endpoint 3 DMA address register
address_offset : 0x374 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOEP3DMAADDR DOEP3DMAADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DMAADDR

DMAADDR : DMA address
bits : 0 - 31 (32 bit)


DEP1INT

device endpoint 1 interrupt register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DEP1INT DEP1INT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IEP1INT OEP1INT

IEP1INT : IN endpoint 1 interrupt bits
bits : 1 - 1 (1 bit)

OEP1INT : OUT endpoint 1 interrupt bits
bits : 17 - 17 (1 bit)


DOEP4CTL

Device OUT endpoint-4 control register
address_offset : 0x380 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOEP4CTL DOEP4CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MPL EPACT EOFRM_DPID NAKS EPTYPE SNOOP STALL CNAK SNAK SD0PID_SEVENFRM SD1PID_SODDFRM EPD EPEN

MPL : maximum packet length
bits : 0 - 10 (11 bit)
access : read-write

EPACT : Endpoint active
bits : 15 - 15 (1 bit)
access : read-write

EOFRM_DPID : EOFRM/DPID
bits : 16 - 16 (1 bit)
access : read-only

NAKS : NAK status
bits : 17 - 17 (1 bit)
access : read-only

EPTYPE : Endpoint type
bits : 18 - 19 (2 bit)
access : read-write

SNOOP : Snoop mode
bits : 20 - 20 (1 bit)
access : read-write

STALL : STALL handshake
bits : 21 - 21 (1 bit)
access : read-write

CNAK : Clear NAK
bits : 26 - 26 (1 bit)
access : write-only

SNAK : Set NAK
bits : 27 - 27 (1 bit)
access : write-only

SD0PID_SEVENFRM : SD0PID/SEVENFRM
bits : 28 - 28 (1 bit)
access : write-only

SD1PID_SODDFRM : SD1PID/SODDFRM
bits : 29 - 29 (1 bit)
access : write-only

EPD : Endpoint disable
bits : 30 - 30 (1 bit)
access : read-write

EPEN : Endpoint enable
bits : 31 - 31 (1 bit)
access : read-write


DOEP4INTF

device out endpoint-4 interrupt register
address_offset : 0x388 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOEP4INTF DOEP4INTF read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TF EPDIS STPF EPRXFOVR BTBSTP NYET

TF : Transfer finished
bits : 0 - 0 (1 bit)

EPDIS : Endpoint disabled
bits : 1 - 1 (1 bit)

STPF : Setup phase finished
bits : 3 - 3 (1 bit)

EPRXFOVR : Endpoint Rx FIFO overrun
bits : 4 - 4 (1 bit)

BTBSTP : Back-to-back SETUP packets
bits : 6 - 6 (1 bit)

NYET : NYET handshake is sent
bits : 14 - 14 (1 bit)


DOEP4LEN

device OUT endpoint-4 transfer length register
address_offset : 0x390 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOEP4LEN DOEP4LEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TLEN PCNT STPCNT_RXDPID

TLEN : Transfer length
bits : 0 - 18 (19 bit)

PCNT : Packet count
bits : 19 - 28 (10 bit)

STPCNT_RXDPID : SETUP packet count/Received data PID
bits : 29 - 30 (2 bit)


DOEP4DMAADDR

device OUT endpoint 4 DMA address register
address_offset : 0x394 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOEP4DMAADDR DOEP4DMAADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DMAADDR

DMAADDR : DMA address
bits : 0 - 31 (32 bit)


DOEP5CTL

Device OUT endpoint-5 control register
address_offset : 0x3A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOEP5CTL DOEP5CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MPL EPACT EOFRM_DPID NAKS EPTYPE SNOOP STALL CNAK SNAK SD0PID_SEVENFRM SD1PID_SODDFRM EPD EPEN

MPL : maximum packet length
bits : 0 - 10 (11 bit)
access : read-write

EPACT : Endpoint active
bits : 15 - 15 (1 bit)
access : read-write

EOFRM_DPID : EOFRM/DPID
bits : 16 - 16 (1 bit)
access : read-only

NAKS : NAK status
bits : 17 - 17 (1 bit)
access : read-only

EPTYPE : Endpoint type
bits : 18 - 19 (2 bit)
access : read-write

SNOOP : Snoop mode
bits : 20 - 20 (1 bit)
access : read-write

STALL : STALL handshake
bits : 21 - 21 (1 bit)
access : read-write

CNAK : Clear NAK
bits : 26 - 26 (1 bit)
access : write-only

SNAK : Set NAK
bits : 27 - 27 (1 bit)
access : write-only

SD0PID_SEVENFRM : SD0PID/SEVENFRM
bits : 28 - 28 (1 bit)
access : write-only

SD1PID_SODDFRM : SD1PID/SODDFRM
bits : 29 - 29 (1 bit)
access : write-only

EPD : Endpoint disable
bits : 30 - 30 (1 bit)
access : read-write

EPEN : Endpoint enable
bits : 31 - 31 (1 bit)
access : read-write


DOEP5INTF

device out endpoint-5 interrupt register
address_offset : 0x3A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOEP5INTF DOEP5INTF read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TF EPDIS STPF EPRXFOVR BTBSTP NYET

TF : Transfer finished
bits : 0 - 0 (1 bit)

EPDIS : Endpoint disabled
bits : 1 - 1 (1 bit)

STPF : Setup phase finished
bits : 3 - 3 (1 bit)

EPRXFOVR : Endpoint Rx FIFO overrun
bits : 4 - 4 (1 bit)

BTBSTP : Back-to-back SETUP packets
bits : 6 - 6 (1 bit)

NYET : NYET handshake is sent
bits : 14 - 14 (1 bit)


DOEP5LEN

device OUT endpoint-5 transfer length register
address_offset : 0x3B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOEP5LEN DOEP5LEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TLEN PCNT STPCNT_RXDPID

TLEN : Transfer length
bits : 0 - 18 (19 bit)

PCNT : Packet count
bits : 19 - 28 (10 bit)

STPCNT_RXDPID : SETUP packet count/Received data PID
bits : 29 - 30 (2 bit)


DOEP5DMAADDR

device OUT endpoint 5 DMA address register
address_offset : 0x3B4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOEP5DMAADDR DOEP5DMAADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DMAADDR

DMAADDR : DMA address
bits : 0 - 31 (32 bit)


DEP1INTEN

device endpoint 1 interrupt enable register
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DEP1INTEN DEP1INTEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IEP1INTEN OEP1INTEN

IEP1INTEN : IN endpoint 1 interrupt enable bits
bits : 1 - 1 (1 bit)

OEP1INTEN : OUT endpoint 1 interrupt enable bits
bits : 17 - 17 (1 bit)


DCTL

device control register (DCTL)
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DCTL DCTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RWKUP SD GINS GONS SGINAK CGINAK SGONAK CGONAK POIF

RWKUP : Remote wakeup signaling
bits : 0 - 0 (1 bit)
access : read-write

SD : Soft disconnect
bits : 1 - 1 (1 bit)
access : read-write

GINS : Global IN NAK status
bits : 2 - 2 (1 bit)
access : read-only

GONS : Global OUT NAK status
bits : 3 - 3 (1 bit)
access : read-only

SGINAK : Set global IN NAK
bits : 7 - 7 (1 bit)
access : read-write

CGINAK : Clear global IN NAK
bits : 8 - 8 (1 bit)
access : read-write

SGONAK : Set global OUT NAK
bits : 9 - 9 (1 bit)
access : read-write

CGONAK : Clear global OUT NAK
bits : 10 - 10 (1 bit)
access : read-write

POIF : Power-on initialization finished
bits : 11 - 11 (1 bit)
access : read-write


DIEP1INTEN

device IN endpoint 1 interrupt mask register (DIEP1INTEN)
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEP1INTEN DIEP1INTEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TFEN EPDISEN CITOEN EPTXFUDEN IEPNEEN NAKEN

TFEN : Transfer finished interrupt enable
bits : 0 - 0 (1 bit)

EPDISEN : Endpoint disabled interrupt enable
bits : 1 - 1 (1 bit)

CITOEN : Control IN timeout condition interrupt enable (Non-isochronous endpoints)
bits : 3 - 3 (1 bit)

EPTXFUDEN : Endpoint Tx FIFO underrun interrupt enable bit
bits : 4 - 4 (1 bit)

IEPNEEN : IN endpoint NAK effective interrupt enable
bits : 6 - 6 (1 bit)

NAKEN : NAK handshake sent by USBHS interrupt enable bit
bits : 13 - 13 (1 bit)


DSTAT

device status register (DSTAT)
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

DSTAT DSTAT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SPST ES FNRSOF

SPST : Suspend status
bits : 0 - 0 (1 bit)

ES : Enumerated speed
bits : 1 - 2 (2 bit)

FNRSOF : Frame number of the received SOF
bits : 8 - 21 (14 bit)


DOEP1INTEN

device OUT endpoint common interrupt enable register (DOEP1INTEN)
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOEP1INTEN DOEP1INTEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TFEN EPDISEN STPFEN EPRXFOVREN BTBSTPEN NYETEN

TFEN : Transfer completed interrupt enable
bits : 0 - 0 (1 bit)

EPDISEN : Endpoint disabled interrupt enable
bits : 1 - 1 (1 bit)

STPFEN : SETUP phase done interrupt enable
bits : 3 - 3 (1 bit)

EPRXFOVREN : Endpoint Rx FIFO overrun interrupt enable
bits : 4 - 4 (1 bit)

BTBSTPEN : Back-to-back SETUP packets ( Only for control OUT endpoint) interrupt enable bit
bits : 6 - 6 (1 bit)

NYETEN : NYET handshake is sent interrupt enable bit
bits : 14 - 14 (1 bit)



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