\n
address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :
Configuration register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ADCSMPTIMES : ADC sample times
bits : 8 - 11 (4 bit)
access : read-write
Configuration register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHRMP8 : Remap the Channel8
bits : 0 - 4 (5 bit)
access : read-write
CHRMP9 : Remap the Channel9
bits : 8 - 12 (5 bit)
access : read-write
CHRMP10 : Remap the Channel10
bits : 16 - 20 (5 bit)
access : read-write
CHRMP11 : Remap the Channel11
bits : 24 - 28 (5 bit)
access : read-write
Configuration register
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LTH : set the low threshold value for the 1st hardware detect channel
bits : 0 - 11 (12 bit)
access : read-write
HTH : set the high threshold value for the 1st hardware detect channel
bits : 16 - 27 (12 bit)
access : read-write
Configuration register
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LTH : set the low threshold value for the 2nd hardware detect channel
bits : 0 - 11 (12 bit)
access : read-write
HTH : set the high threshold value for the 2nd hardware detect channel
bits : 16 - 27 (12 bit)
access : read-write
Configuration register
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LTH : set the low threshold value for the 3rd hardware detect channel
bits : 0 - 11 (12 bit)
access : read-write
HTH : set the high threshold value for the 3rd hardware detect channel
bits : 16 - 27 (12 bit)
access : read-write
Configuration register
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LTH : set the low threshold value for the 4th hardware detect channel
bits : 0 - 11 (12 bit)
access : read-write
HTH : set the high threshold value for the 4th hardware detect channel
bits : 16 - 27 (12 bit)
access : read-write
Configuration register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHRMP12 : Remap the Channel12
bits : 0 - 4 (5 bit)
access : read-write
CHRMP13 : Remap the Channel13
bits : 8 - 12 (5 bit)
access : read-write
CHRMP14 : Remap the Channel14
bits : 16 - 20 (5 bit)
access : read-write
CHRMP15 : Remap the Channel15
bits : 24 - 28 (5 bit)
access : read-write
Control register
address_offset : 0x160 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DETEN : Enable the Hardware detect in channels
bits : 0 - 23 (24 bit)
access : read-write
DETOKNUM : set the number of rawdata in threshold
bits : 24 - 26 (3 bit)
access : read-write
DETALLNUM : set the number of all rawdata
bits : 28 - 30 (3 bit)
access : read-write
Control register
address_offset : 0x164 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DETBYP : Enable bypass hardware detect
bits : 0 - 0 (1 bit)
access : read-write
SLTIMER : From FastTimer mode switch to slowTimer mode
bits : 1 - 1 (1 bit)
access : read-write
SMPT : The cycle of ADC capture Data
bits : 4 - 6 (3 bit)
access : read-write
DISTSCRDY : the state of close touch function
bits : 8 - 8 (1 bit)
access : read-only
Control register
address_offset : 0x168 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHSEL : selection touch channels
bits : 0 - 23 (24 bit)
access : read-write
Configuration register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHRMP16 : Remap the Channel16
bits : 0 - 4 (5 bit)
access : read-write
CHRMP17 : Remap the Channel17
bits : 8 - 12 (5 bit)
access : read-write
CHRMP18 : Remap the Channel18
bits : 16 - 20 (5 bit)
access : read-write
CHRMP19 : Remap the Channel19
bits : 24 - 28 (5 bit)
access : read-write
Configuration register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHRMP20 : Remap the Channel20
bits : 0 - 4 (5 bit)
access : read-write
CHRMP21 : Remap the Channel21
bits : 8 - 12 (5 bit)
access : read-write
CHRMP22 : Remap the Channel22
bits : 16 - 20 (5 bit)
access : read-write
CHRMP23 : Remap the Channel23
bits : 24 - 28 (5 bit)
access : read-write
Configuration register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DISCHGTIME : configure the time of discharge
bits : 0 - 3 (4 bit)
access : read-write
SHDTIME : configure the time of charge shielding channel
bits : 8 - 11 (4 bit)
access : read-write
Configuration register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CH0CFGGRP : set the index of channel0 parameter
bits : 0 - 1 (2 bit)
access : read-write
CH1CFGGRP : set the index of channel1 parameter
bits : 2 - 3 (2 bit)
access : read-write
CH2CFGGRP : set the index of channel2 parameter
bits : 4 - 5 (2 bit)
access : read-write
CH3CFGGRP : set the index of channel3 parameter
bits : 6 - 7 (2 bit)
access : read-write
CH4CFGGRP : set the index of channel4 parameter
bits : 8 - 9 (2 bit)
access : read-write
CH5CFGGRP : set the index of channel5 parameter
bits : 10 - 11 (2 bit)
access : read-write
CH6CFGGRP : set the index of channel6 parameter
bits : 12 - 13 (2 bit)
access : read-write
CH7CFGGRP : set the index of channel7 parameter
bits : 14 - 15 (2 bit)
access : read-write
CH8CFGGRP : set the index of channel8 parameter
bits : 16 - 17 (2 bit)
access : read-write
CH9CFGGRP : set the index of channel9 parameter
bits : 18 - 19 (2 bit)
access : read-write
CH10CFGGRP : set the index of channel10 parameter
bits : 20 - 21 (2 bit)
access : read-write
CH11CFGGRP : set the index of channel11 parameter
bits : 22 - 23 (2 bit)
access : read-write
CH12CFGGRP : set the index of channel12 parameter
bits : 24 - 25 (2 bit)
access : read-write
CH13CFGGRP : set the index of channel13 parameter
bits : 26 - 27 (2 bit)
access : read-write
CH14CFGGRP : set the index of channel14 parameter
bits : 28 - 29 (2 bit)
access : read-write
CH15CFGGRP : set the index of channel15 parameter
bits : 30 - 31 (2 bit)
access : read-write
Configuration register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CH16CFGGRP : set the index of channel16 parameter
bits : 0 - 1 (2 bit)
access : read-write
CH17CFGGRP : set the index of channel17 parameter
bits : 2 - 3 (2 bit)
access : read-write
CH18CFGGRP : set the index of channel18 parameter
bits : 4 - 5 (2 bit)
access : read-write
CH19CFGGRP : set the index of channel19 parameter
bits : 6 - 7 (2 bit)
access : read-write
CH20CFGGRP : set the index of channel20 parameter
bits : 8 - 9 (2 bit)
access : read-write
CH21CFGGRP : set the index of channel21 parameter
bits : 10 - 11 (2 bit)
access : read-write
CH22CFGGRP : set the index of channel22 parameter
bits : 12 - 13 (2 bit)
access : read-write
CH23CFGGRP : set the index of channel23 parameter
bits : 14 - 15 (2 bit)
access : read-write
Configuration register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTGTIMES0 : set 1st group integrate times
bits : 0 - 7 (8 bit)
access : read-write
INTGTIMES1 : set 2nd group integrate times
bits : 8 - 15 (8 bit)
access : read-write
INTGTIMES2 : set 3rd group integrate times
bits : 16 - 23 (8 bit)
access : read-write
INTGTIMES3 : set 4th group integrate times
bits : 24 - 31 (8 bit)
access : read-write
Configuration register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ISCA0 : set 1st group I1/I2 scale
bits : 0 - 3 (4 bit)
access : read-write
ISCA1 : set 2nd group I1/I2 scale
bits : 4 - 7 (4 bit)
access : read-write
ISCA2 : set 3rd group I1/I2 scale
bits : 8 - 11 (4 bit)
access : read-write
ISCA3 : set 4th group I1/I2 scale
bits : 12 - 15 (4 bit)
access : read-write
Configuration register
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SHDEN : Enable shielding function
bits : 3 - 3 (1 bit)
access : read-write
CCI : set the current of cancel capacitance
bits : 12 - 15 (4 bit)
access : read-write
Control register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHEN : Enable 24 Channels
bits : 0 - 23 (24 bit)
access : read-write
TSCEN : Enable Touch function
bits : 24 - 24 (1 bit)
access : read-write
MODSEL : select the work mode
bits : 28 - 28 (1 bit)
access : read-write
Configuration register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CANCCSEL0 : Set the value of Cancel Capacitance In Channel0
bits : 0 - 8 (9 bit)
access : read-write
CANCCSEL1 : Set the value of Cancel Capacitance In Channel1
bits : 16 - 24 (9 bit)
access : read-write
Configuration register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CANCCSEL2 : Set the value of Cancel Capacitance In Channel2
bits : 0 - 8 (9 bit)
access : read-write
CANCCSEL3 : Set the value of Cancel Capacitance In Channel3
bits : 16 - 24 (9 bit)
access : read-write
Configuration register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CANCCSEL4 : Set the value of Cancel Capacitance In Channel4
bits : 0 - 8 (9 bit)
access : read-write
CANCCSEL5 : Set the value of Cancel Capacitance In Channel5
bits : 16 - 24 (9 bit)
access : read-write
Configuration register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CANCCSEL6 : Set the value of Cancel Capacitance In Channel6
bits : 0 - 8 (9 bit)
access : read-write
CANCCSEL7 : Set the value of Cancel Capacitance In Channel7
bits : 16 - 24 (9 bit)
access : read-write
Configuration register
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CANCCSEL8 : Set the value of Cancel Capacitance In Channel8
bits : 0 - 8 (9 bit)
access : read-write
CANCCSEL9 : Set the value of Cancel Capacitance In Channel9
bits : 16 - 24 (9 bit)
access : read-write
Configuration register
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CANCCSEL10 : Set the value of Cancel Capacitance In Channel10
bits : 0 - 8 (9 bit)
access : read-write
CANCCSEL11 : Set the value of Cancel Capacitance In Channel11
bits : 16 - 24 (9 bit)
access : read-write
Configuration register
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CANCCSEL12 : Set the value of Cancel Capacitance In Channel12
bits : 0 - 8 (9 bit)
access : read-write
CANCCSEL13 : Set the value of Cancel Capacitance In Channel13
bits : 16 - 24 (9 bit)
access : read-write
Configuration register
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CANCCSEL14 : Set the value of Cancel Capacitance In Channel14
bits : 0 - 8 (9 bit)
access : read-write
CANCCSEL15 : Set the value of Cancel Capacitance In Channel15
bits : 16 - 24 (9 bit)
access : read-write
Configuration register
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CANCCSEL16 : Set the value of Cancel Capacitance In Channel16
bits : 0 - 8 (9 bit)
access : read-write
CANCCSEL17 : Set the value of Cancel Capacitance In Channel17
bits : 16 - 24 (9 bit)
access : read-write
Configuration register
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CANCCSEL18 : Set the value of Cancel Capacitance In Channel18
bits : 0 - 8 (9 bit)
access : read-write
CANCCSEL19 : Set the value of Cancel Capacitance In Channel19
bits : 16 - 24 (9 bit)
access : read-write
Configuration register
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CANCCSEL20 : Set the value of Cancel Capacitance In Channel20
bits : 0 - 8 (9 bit)
access : read-write
CANCCSEL21 : Set the value of Cancel Capacitance In Channel21
bits : 16 - 24 (9 bit)
access : read-write
Configuration register
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CANCCSEL22 : Set the value of Cancel Capacitance In Channel22
bits : 0 - 8 (9 bit)
access : read-write
CANCCSEL23 : Set the value of Cancel Capacitance In Channel23
bits : 16 - 24 (9 bit)
access : read-write
Configuration register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHRMP0 : Remap the Channel0
bits : 0 - 4 (5 bit)
access : read-write
CHRMP1 : Remap the Channel1
bits : 8 - 12 (5 bit)
access : read-write
CHRMP2 : Remap the Channel2
bits : 16 - 20 (5 bit)
access : read-write
CHRMP3 : Remap the Channel3
bits : 24 - 28 (5 bit)
access : read-write
RawData register
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DATA : Get the RawData of Channel0
bits : 0 - 15 (16 bit)
access : read-only
RawData register
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DATA : Get the RawData of Channel1
bits : 0 - 15 (16 bit)
access : read-only
RawData register
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DATA : Get the RawData of Channel2
bits : 0 - 15 (16 bit)
access : read-only
RawData register
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DATA : Get the RawData of Channel3
bits : 0 - 15 (16 bit)
access : read-only
RawData register
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DATA : Get the RawData of Channel4
bits : 0 - 15 (16 bit)
access : read-only
RawData register
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DATA : Get the RawData of Channel5
bits : 0 - 15 (16 bit)
access : read-only
RawData register
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DATA : Get the RawData of Channel6
bits : 0 - 15 (16 bit)
access : read-only
RawData register
address_offset : 0x9C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DATA : Get the RawData of Channel7
bits : 0 - 15 (16 bit)
access : read-only
RawData register
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DATA : Get the RawData of Channel8
bits : 0 - 15 (16 bit)
access : read-only
RawData register
address_offset : 0xA4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DATA : Get the RawData of Channel9
bits : 0 - 15 (16 bit)
access : read-only
RawData register
address_offset : 0xA8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DATA : Get the RawData of Channel10
bits : 0 - 15 (16 bit)
access : read-only
RawData register
address_offset : 0xAC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DATA : Get the RawData of Channel11
bits : 0 - 15 (16 bit)
access : read-only
RawData register
address_offset : 0xB0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DATA : Get the RawData of Channel12
bits : 0 - 15 (16 bit)
access : read-only
RawData register
address_offset : 0xB4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DATA : Get the RawData of Channel13
bits : 0 - 15 (16 bit)
access : read-only
RawData register
address_offset : 0xB8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DATA : Get the RawData of Channel14
bits : 0 - 15 (16 bit)
access : read-only
RawData register
address_offset : 0xBC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DATA : Get the RawData of Channel15
bits : 0 - 15 (16 bit)
access : read-only
Configuration register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHRMP4 : Remap the Channel4
bits : 0 - 4 (5 bit)
access : read-write
CHRMP5 : Remap the Channel5
bits : 8 - 12 (5 bit)
access : read-write
CHRMP6 : Remap the Channel6
bits : 16 - 20 (5 bit)
access : read-write
CHRMP7 : Remap the Channel7
bits : 24 - 28 (5 bit)
access : read-write
RawData register
address_offset : 0xC0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DATA : Get the RawData of Channel16
bits : 0 - 15 (16 bit)
access : read-only
RawData register
address_offset : 0xC4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DATA : Get the RawData of Channel17
bits : 0 - 15 (16 bit)
access : read-only
RawData register
address_offset : 0xC8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DATA : Get the RawData of Channel18
bits : 0 - 15 (16 bit)
access : read-only
RawData register
address_offset : 0xCC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DATA : Get the RawData of Channel19
bits : 0 - 15 (16 bit)
access : read-only
RawData register
address_offset : 0xD0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DATA : Get the RawData of Channel20
bits : 0 - 15 (16 bit)
access : read-only
RawData register
address_offset : 0xD4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DATA : Get the RawData of Channel21
bits : 0 - 15 (16 bit)
access : read-only
RawData register
address_offset : 0xD8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DATA : Get the RawData of Channel22
bits : 0 - 15 (16 bit)
access : read-only
RawData register
address_offset : 0xDC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DATA : Get the RawData of Channel23
bits : 0 - 15 (16 bit)
access : read-only
Touch status register
address_offset : 0xE0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CPLTF : The flag of touch work finished
bits : 0 - 0 (1 bit)
access : read-write
TOF : The flag of timeout error
bits : 4 - 4 (1 bit)
access : read-write
FSTMODF : SlowTimer or FastTimer work mode
bits : 8 - 8 (1 bit)
access : read-only
Interrupt control register
address_offset : 0xE4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CPLTINTEN : Enable Touch interrupt
bits : 0 - 0 (1 bit)
access : read-write
TOINTEN : Enable Touch error Interrupt
bits : 4 - 4 (1 bit)
access : read-write
Configuration register
address_offset : 0xE8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BASCLKDIV : Set the division factor of Base Timer
bits : 0 - 15 (16 bit)
access : read-write
Configuration register
address_offset : 0xEC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FSTCLKDIV : Set the division factor of Fast Timer
bits : 0 - 7 (8 bit)
access : read-write
SLCLKDIV : Set the division factor of slow Timer
bits : 8 - 15 (8 bit)
access : read-write
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