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PKC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x84 byte (0x0)
mem_usage : registers
protection :

Registers

CTRL

CFG3

CFG4

CFG5

CFG6

CFG7

CFG8

CFG9

CFG10

CFG11

CFG12

CFG13

CFG0

SW_CTRL

SW_CFG0

SW_CFG1

SW_CFG2

SW_CFG3

SW_CFG4

SW_CFG5

SW_CFG6

SW_CFG7

SW_CFG8

SW_CFG9

SW_CFG10

SW_CFG11

SW_CFG12

SW_CFG13

CFG1

INT_STAT

INT_EN

STAT

CFG2


CTRL

PKC Controller Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTRL CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EN START SW_CTRL RST

EN : pkc core enable 0x0: disable PKC 0x1: enable PKC
bits : 0 - 0 (1 bit)
access : read-write

START : Only used in hardware mode. After MCU configure all parameters, write 0 and then write 1 to this bit, PKC start to work
bits : 1 - 1 (1 bit)
access : read-write

SW_CTRL : Only used in hardware mode. After MCU configure all parameters, write 0 and then write 1 to this bit, PKC start to work
bits : 4 - 4 (1 bit)
access : read-write

RST : Write 0 and then write 1 to this bit, force PKC core to reset
bits : 8 - 8 (1 bit)
access : read-write


CFG3

PKC Configuration 3 Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFG3 CFG3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GZ_POINT R0X_POINT

GZ_POINT : Gz point in sp_ram
bits : 0 - 8 (9 bit)
access : read-write

R0X_POINT : R0x point in sp_ram
bits : 16 - 24 (9 bit)
access : read-write


CFG4

PKC Configuration 4 Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFG4 CFG4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 R0Y_POINT R0Z_POINT

R0Y_POINT : R0y point in sp_ram
bits : 0 - 8 (9 bit)
access : read-write

R0Z_POINT : R0z point in sp_ram
bits : 16 - 24 (9 bit)
access : read-write


CFG5

PKC Configuration 5 Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFG5 CFG5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 R1X_POINT R1Y_POINT

R1X_POINT : R1x point in sp_ram
bits : 0 - 8 (9 bit)
access : read-write

R1Y_POINT : R1y point in sp_ram
bits : 16 - 24 (9 bit)
access : read-write


CFG6

PKC Configuration 6 Register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFG6 CFG6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 R1Z_POINT TEMP1_POINT

R1Z_POINT : R1z point in sp_ram
bits : 0 - 8 (9 bit)
access : read-write

TEMP1_POINT : temp1 point in sp_ram
bits : 16 - 24 (9 bit)
access : read-write


CFG7

PKC Configuration 7 Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFG7 CFG7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TEMP2_POINT TEMP3_POINT

TEMP2_POINT : temp2 point in sp_ram
bits : 0 - 8 (9 bit)
access : read-write

TEMP3_POINT : temp3 point in sp_ram
bits : 16 - 24 (9 bit)
access : read-write


CFG8

PKC Configuration 8 Register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFG8 CFG8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TEMP4_POINT TEMP5_POINT

TEMP4_POINT : temp4 point in sp_ram
bits : 0 - 8 (9 bit)
access : read-write

TEMP5_POINT : temp5 point in sp_ram
bits : 16 - 24 (9 bit)
access : read-write


CFG9

PKC Configuration 9 Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFG9 CFG9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TEMP6_POINT CONT1_POINT

TEMP6_POINT : temp6 point in sp_ram
bits : 0 - 8 (9 bit)
access : read-write

CONT1_POINT : constant 1 point in sp_ram
bits : 16 - 24 (9 bit)
access : read-write


CFG10

PKC Configuration 10 Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFG10 CFG10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 X1_POINT X2_POINT

X1_POINT : X1 point in sp_ram
bits : 0 - 8 (9 bit)
access : read-write

X2_POINT : X2 point in sp_ram
bits : 16 - 24 (9 bit)
access : read-write


CFG11

PKC Configuration 11 Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFG11 CFG11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MIT_POINT KT_POINT

MIT_POINT : Only used in hardware mode, mi point in sp_ram
bits : 0 - 8 (9 bit)
access : read-write

KT_POINT : software compute 2^256 mod point and write to sp_ram
bits : 16 - 24 (9 bit)
access : read-write


CFG12

PKC Configuration 12 Register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFG12 CFG12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A_POINT B_POINT

A_POINT : Curve parameter a in Montgomery field
bits : 0 - 8 (9 bit)
access : read-write

B_POINT : Curve parameter b in Montgomery field
bits : 16 - 24 (9 bit)
access : read-write


CFG13

PKC Configuration 13 Register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFG13 CFG13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CONSTQ

CONSTQ : Constant used in Montgomery Multiplication
bits : 0 - 31 (32 bit)
access : read-write


CFG0

PKC Configuration 0 Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFG0 CFG0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 K_POINT R_POINT

K_POINT : K point in sp_ram
bits : 0 - 8 (9 bit)
access : read-write

R_POINT : R point in sp_ram
bits : 16 - 24 (9 bit)
access : read-write


SW_CTRL

PKC Software Controller Register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_CTRL SW_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 START MODE DM_EN RCG_EN

START : Only used in software mode. MCU write 0 to this bit and then write 1 to this bit to start PKC
bits : 0 - 0 (1 bit)
access : read-write

MODE : Only used in software mode. 0x0: Montgomery Multiplication 0x1: Mod Inversion 0x2: Mod Addition 0x3: Mod Subtraction 0x4: Mod Comparison 0x5: Mod Shift 0x6: Big Integer Multiplication 0x7: Bit Integer Addition
bits : 4 - 6 (3 bit)
access : read-write

DM_EN : Enable dummy multiplication 0x0: Disable 0x1: Enable
bits : 8 - 8 (1 bit)
access : read-write

RCG_EN : Enable random clock gating 0x0: Disable 0x1: Enable
bits : 9 - 9 (1 bit)
access : read-write


SW_CFG0

PKC Software Configuration 0 Register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_CFG0 SW_CFG0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MMA_POINT MMB_POINT

MMA_POINT : Modular multiplication A point in sp_ram
bits : 0 - 8 (9 bit)
access : read-write

MMB_POINT : Modular multiplication B point in sp_ram
bits : 16 - 24 (9 bit)
access : read-write


SW_CFG1

PKC Software Configuration 1 Register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_CFG1 SW_CFG1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MMP_POINT MMC_POINT

MMP_POINT : Modular multiplication P point in sp_ram
bits : 0 - 8 (9 bit)
access : read-write

MMC_POINT : Modular multiplication C point in sp_ram
bits : 16 - 24 (9 bit)
access : read-write


SW_CFG2

PKC Software Configuration 2 Register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_CFG2 SW_CFG2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MASA_POINT MASB_POINT

MASA_POINT : Modular addition/subtraction A point in sp_ram
bits : 0 - 8 (9 bit)
access : read-write

MASB_POINT : Modular addition/subtraction B point in sp_ram
bits : 16 - 24 (9 bit)
access : read-write


SW_CFG3

PKC Software Configuration 3 Register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_CFG3 SW_CFG3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MASP_POINT MASC_POINT

MASP_POINT : Modular addition/subtraction P point in sp_ram
bits : 0 - 8 (9 bit)
access : read-write

MASC_POINT : Modular addition/subtraction C point in sp_ram
bits : 16 - 24 (9 bit)
access : read-write


SW_CFG4

PKC Software Configuration 4 Register
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_CFG4 SW_CFG4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MIU_POINT MIV_POINT

MIU_POINT : Modular invertion U point in sp_ram
bits : 0 - 8 (9 bit)
access : read-write

MIV_POINT : Modular invertion V point in sp_ram
bits : 16 - 24 (9 bit)
access : read-write


SW_CFG5

PKC Software Configuration 5 Register
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_CFG5 SW_CFG5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MIX1_POINT MIX2_POINT

MIX1_POINT : Modular invertion X1 point in sp_ram
bits : 0 - 8 (9 bit)
access : read-write

MIX2_POINT : Modular invertion X2 point in sp_ram
bits : 16 - 24 (9 bit)
access : read-write


SW_CFG6

PKC Software Configuration 6 Register
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_CFG6 SW_CFG6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MIT_POINT

MIT_POINT : Modular invertion TEMP point in sp_ram
bits : 0 - 8 (9 bit)
access : read-write


SW_CFG7

PKC Software Configuration 7 Register
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_CFG7 SW_CFG7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LEN

LEN : Operator word length configuration, in software mode: 0x07: 256bits 0x08: 288bits - 0x3F: 2048bits In hardware mode fixed to 0x07
bits : 0 - 8 (9 bit)
access : read-write


SW_CFG8

PKC Software Configuration 8 Register
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

SW_CFG8 SW_CFG8 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MIK_OUT

MIK_OUT : K out in modular invertion operation
bits : 0 - 12 (13 bit)
access : read-only


SW_CFG9

PKC Software Configuration 9 Register
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_CFG9 SW_CFG9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RDM_SEED

RDM_SEED : Random dummy multiplication seed
bits : 0 - 31 (32 bit)
access : read-write


SW_CFG10

PKC Software Configuration 10 Register
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_CFG10 SW_CFG10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BMA_POINT BMB_POINT

BMA_POINT : Big multiplication A point in sp_ram
bits : 0 - 8 (9 bit)
access : read-write

BMB_POINT : Big multiplication B point in sp_ram
bits : 16 - 24 (9 bit)
access : read-write


SW_CFG11

PKC Software Configuration 11 Register
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_CFG11 SW_CFG11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BMC_POINT BAA_POINT

BMC_POINT : Big multiplication C point in sp_ram
bits : 0 - 8 (9 bit)
access : read-write

BAA_POINT : Big addition A point in sp_ram
bits : 16 - 24 (9 bit)
access : read-write


SW_CFG12

PKC Software Configuration 12 Register
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_CFG12 SW_CFG12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BAB_POINT BAC_POINT

BAB_POINT : Big addition B point in sp_ram
bits : 0 - 8 (9 bit)
access : read-write

BAC_POINT : Big addition C point in sp_ram
bits : 16 - 24 (9 bit)
access : read-write


SW_CFG13

PKC Software Configuration 13 Register
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_CFG13 SW_CFG13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RCG_SEED

RCG_SEED : Random clock gating seed
bits : 0 - 31 (32 bit)
access : read-write


CFG1

PKC Configuration 1 Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFG1 CFG1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P_POINT R2_POINT

P_POINT : p point in sp_ram
bits : 0 - 8 (9 bit)
access : read-write

R2_POINT : R^2 point in sp_ram
bits : 16 - 24 (9 bit)
access : read-write


INT_STAT

PKC Interrupt Status Register
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INT_STAT INT_STAT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CPLT_INT_FLAG ERR_INT_FLAG BIAO_INT_FLAG

CPLT_INT_FLAG : PKC complete interrupt flag, write 1 to clear
bits : 0 - 0 (1 bit)
access : read-write

ERR_INT_FLAG : PKC error interrupt flag, write 1 to clear
bits : 1 - 1 (1 bit)
access : read-write

BIAO_INT_FLAG : PKC big integer add overflow flag, write 1 to clear
bits : 2 - 2 (1 bit)
access : read-write


INT_EN

PKC Interrupt Enable Register
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INT_EN INT_EN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CPLT_INT_EN ERR_INT_EN BIAO_INT_EN

CPLT_INT_EN : PKC complete interrupt enable
bits : 0 - 0 (1 bit)
access : read-write

ERR_INT_EN : PKC error interrupt enable
bits : 1 - 1 (1 bit)
access : read-write

BIAO_INT_EN : PKC big integer add overflow interrupt enable
bits : 2 - 2 (1 bit)
access : read-write


STAT

PKC Status Register
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

STAT STAT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BUSY

BUSY : PKC busy status
bits : 0 - 0 (1 bit)
access : read-only


CFG2

PKC Configuration 2 Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFG2 CFG2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GX_POINT GY_POINT

GX_POINT : Gx point in sp_ram
bits : 0 - 8 (9 bit)
access : read-write

GY_POINT : Gy point in sp_ram
bits : 16 - 24 (9 bit)
access : read-write



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