\n
address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection :
CPUID
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REVISION : REVISION
bits : 0 - 3 (4 bit)
access : read-write
PARTNO : PARTNO
bits : 4 - 19 (16 bit)
access : read-write
ARCHITECTURE : ARCHITECTURE
bits : 16 - 35 (20 bit)
access : read-write
VARIANT : VARIANT
bits : 20 - 43 (24 bit)
access : read-write
IMPLEMENTER : IMPLEMENTER
bits : 24 - 55 (32 bit)
access : read-write
SCR
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SLEEPONEXIT : SLEEPONEXIT
bits : 1 - 2 (2 bit)
access : read-write
SLEEPDEEP : SLEEPDEEP
bits : 2 - 4 (3 bit)
access : read-write
SEVONPEND : SEVONPEND
bits : 4 - 8 (5 bit)
access : read-write
CCR
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UNALIGN_TRP : UNALIGN_TRP
bits : 3 - 6 (4 bit)
access : read-write
STKALIGN : STKALIGN
bits : 9 - 18 (10 bit)
access : read-write
SHPR2
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI_11 : PRI_11
bits : 30 - 61 (32 bit)
access : read-write
SHPR3
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI_14 : PRI_14
bits : 22 - 45 (24 bit)
access : read-write
PRI_15 : PRI_15
bits : 30 - 61 (32 bit)
access : read-write
ICSR
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VECTACTIVE : VECTACTIVE
bits : 0 - 8 (9 bit)
access : read-write
RETTOBASE : RETTOBASE
bits : 11 - 22 (12 bit)
access : read-write
VECTPENDING : VECTPENDING
bits : 12 - 33 (22 bit)
access : read-write
ISRPENDING : ISRPENDING
bits : 22 - 44 (23 bit)
access : read-write
ISRPREEMPT : ISRPREEMPT
bits : 23 - 46 (24 bit)
access : read-write
PENDSTCLR : PENDSTCLR
bits : 25 - 50 (26 bit)
access : read-write
PENDSTSET : PENDSTSET
bits : 26 - 52 (27 bit)
access : read-write
PENDSVCLR : PENDSVCLR
bits : 27 - 54 (28 bit)
access : read-write
PENDSVSET : PENDSVSET
bits : 28 - 56 (29 bit)
access : read-write
NMIPENDSET : NMIPENDSET
bits : 31 - 62 (32 bit)
access : read-write
VTOR
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TBLOFF : TBLOFF
bits : 7 - 38 (32 bit)
access : read-write
AIRCR
address_offset : 0xD0C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VECTCLRACTIVE : VECTCLRACTIVE
bits : 1 - 2 (2 bit)
access : read-write
SYSRESETREQ : SYSRESETREQ
bits : 2 - 4 (3 bit)
access : read-write
ENDIANESS : ENDIANESS
bits : 15 - 30 (16 bit)
access : read-write
VECTKEY : VECTKEY
bits : 16 - 47 (32 bit)
access : read-write
SHCSR
address_offset : 0xD24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SVCALLPENDED : SVCALLPENDED
bits : 15 - 30 (16 bit)
access : read-write
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