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PWRCU

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection :

Registers

PWRCU_BAKSR (BAKSR)

PWRCU_LVDCSR (LVDCSR)

PWRCU_BAKREG0 (BAKREG0)

PWRCU_BAKREG1 (BAKREG1)

PWRCU_BAKREG2 (BAKREG2)

PWRCU_BAKREG3 (BAKREG3)

PWRCU_BAKREG4 (BAKREG4)

PWRCU_BAKREG5 (BAKREG5)

PWRCU_BAKREG6 (BAKREG6)

PWRCU_BAKREG7 (BAKREG7)

PWRCU_BAKREG8 (BAKREG8)

PWRCU_BAKREG9 (BAKREG9)

PWRCU_BAKCR (BAKCR)

PWRCU_BAKTEST (BAKTEST)


PWRCU_BAKSR (BAKSR)

PWRCU_BAKSR
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWRCU_BAKSR PWRCU_BAKSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BAKPORF PDF WUPF

BAKPORF : BAKPORF
bits : 0 - 0 (1 bit)
access : read-write

PDF : PDF
bits : 1 - 2 (2 bit)
access : read-write

WUPF : WUPF
bits : 8 - 16 (9 bit)
access : read-write


PWRCU_LVDCSR (LVDCSR)

PWRCU_LVDCSR
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWRCU_LVDCSR PWRCU_LVDCSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BODEN BODRIS BODF LVDEN LVDS01 LVDF LVDIWEN LVDEWEN LVDS2

BODEN : BODEN
bits : 0 - 0 (1 bit)
access : read-write

BODRIS : BODRIS
bits : 1 - 2 (2 bit)
access : read-write

BODF : BODF
bits : 3 - 6 (4 bit)
access : read-write

LVDEN : LVDEN
bits : 16 - 32 (17 bit)
access : read-write

LVDS01 : LVDS01
bits : 17 - 35 (19 bit)
access : read-write

LVDF : LVDF
bits : 19 - 38 (20 bit)
access : read-write

LVDIWEN : LVDIWEN
bits : 20 - 40 (21 bit)
access : read-write

LVDEWEN : LVDEWEN
bits : 21 - 42 (22 bit)
access : read-write

LVDS2 : LVDS2
bits : 22 - 44 (23 bit)
access : read-write


PWRCU_BAKREG0 (BAKREG0)

PWRCU_BAKREG0
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWRCU_BAKREG0 PWRCU_BAKREG0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BAKREG

BAKREG : BAKREG
bits : 0 - 31 (32 bit)
access : read-write


PWRCU_BAKREG1 (BAKREG1)

PWRCU_BAKREG1
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWRCU_BAKREG1 PWRCU_BAKREG1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BAKREG

BAKREG : BAKREG
bits : 0 - 31 (32 bit)
access : read-write


PWRCU_BAKREG2 (BAKREG2)

PWRCU_BAKREG2
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWRCU_BAKREG2 PWRCU_BAKREG2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BAKREG

BAKREG : BAKREG
bits : 0 - 31 (32 bit)
access : read-write


PWRCU_BAKREG3 (BAKREG3)

PWRCU_BAKREG3
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWRCU_BAKREG3 PWRCU_BAKREG3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BAKREG

BAKREG : BAKREG
bits : 0 - 31 (32 bit)
access : read-write


PWRCU_BAKREG4 (BAKREG4)

PWRCU_BAKREG4
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWRCU_BAKREG4 PWRCU_BAKREG4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BAKREG

BAKREG : BAKREG
bits : 0 - 31 (32 bit)
access : read-write


PWRCU_BAKREG5 (BAKREG5)

PWRCU_BAKREG5
address_offset : 0x114 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWRCU_BAKREG5 PWRCU_BAKREG5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BAKREG

BAKREG : BAKREG
bits : 0 - 31 (32 bit)
access : read-write


PWRCU_BAKREG6 (BAKREG6)

PWRCU_BAKREG6
address_offset : 0x118 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWRCU_BAKREG6 PWRCU_BAKREG6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BAKREG

BAKREG : BAKREG
bits : 0 - 31 (32 bit)
access : read-write


PWRCU_BAKREG7 (BAKREG7)

PWRCU_BAKREG7
address_offset : 0x11C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWRCU_BAKREG7 PWRCU_BAKREG7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BAKREG

BAKREG : BAKREG
bits : 0 - 31 (32 bit)
access : read-write


PWRCU_BAKREG8 (BAKREG8)

PWRCU_BAKREG8
address_offset : 0x120 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWRCU_BAKREG8 PWRCU_BAKREG8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BAKREG

BAKREG : BAKREG
bits : 0 - 31 (32 bit)
access : read-write


PWRCU_BAKREG9 (BAKREG9)

PWRCU_BAKREG9
address_offset : 0x124 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWRCU_BAKREG9 PWRCU_BAKREG9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BAKREG

BAKREG : BAKREG
bits : 0 - 31 (32 bit)
access : read-write


PWRCU_BAKCR (BAKCR)

PWRCU_BAKCR
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWRCU_BAKCR PWRCU_BAKCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BAKRST LDOLCM LDOOFF DMOSON WUPEN WUPIEN V15RDYSC DMOSSTS

BAKRST : BAKRST
bits : 0 - 0 (1 bit)
access : read-write

LDOLCM : LDOLCM
bits : 1 - 2 (2 bit)
access : read-write

LDOOFF : LDOOFF
bits : 3 - 6 (4 bit)
access : read-write

DMOSON : DMOSON
bits : 7 - 14 (8 bit)
access : read-write

WUPEN : WUPEN
bits : 8 - 16 (9 bit)
access : read-write

WUPIEN : WUPIEN
bits : 9 - 18 (10 bit)
access : read-write

V15RDYSC : V15RDYSC
bits : 12 - 24 (13 bit)
access : read-write

DMOSSTS : DMOSSTS
bits : 15 - 30 (16 bit)
access : read-write


PWRCU_BAKTEST (BAKTEST)

PWRCU_BAKTEST
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWRCU_BAKTEST PWRCU_BAKTEST read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BAKTEST

BAKTEST : BAKTEST
bits : 0 - 7 (8 bit)
access : read-write



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